Hi,
This series convert reservation of Loongson64 Logic PIO into DeviceTree based
method.
It can be used to replace Huacai's
"MIPS: Loongson64: Reserve legacy MMIO space according to bridge type".
Thanks.
v2:
- Address Rob and Huacai's review comments.
v3:
- Address Rob, Thomas's review comments.
Jiaxun Yang (5):
of_address: Add bus type match for pci ranges parser
MIPS: Loongson64: Process ISA Node in DeviceTree
MIPS: Loongson64: Enlarge IO_SPACE_LIMIT
MIPS: Loongson64: DTS: Fix ISA range for RS780E PCH
MIPS: Loongson64: Add ISA node for LS7A PCH
arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 ++
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 2 +-
arch/mips/include/asm/io.h | 2 -
arch/mips/include/asm/mach-generic/spaces.h | 4 +
.../mips/include/asm/mach-loongson64/spaces.h | 3 +-
arch/mips/loongson64/init.c | 87 +++++++++++++------
drivers/of/address.c | 29 ++++---
include/linux/of_address.h | 4 +
8 files changed, 96 insertions(+), 42 deletions(-)
--
2.28.0.rc1
It can be very big on LS7A PCH systems.
Signed-off-by: Jiaxun Yang <[email protected]>
--
v3: Move IO_SPACE_LIMIT to spaces.h
---
arch/mips/include/asm/io.h | 2 --
arch/mips/include/asm/mach-generic/spaces.h | 4 ++++
arch/mips/include/asm/mach-loongson64/spaces.h | 3 +--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 346fffd9e972..8ca53f17c7c2 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -51,8 +51,6 @@
/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
-#define IO_SPACE_LIMIT 0xffff
-
/*
* On MIPS I/O ports are memory mapped, so we access them using normal
* load/store instructions. mips_io_port_base is the virtual address to
diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h
index ee5ebe98f6cf..c3ac06a6acd2 100644
--- a/arch/mips/include/asm/mach-generic/spaces.h
+++ b/arch/mips/include/asm/mach-generic/spaces.h
@@ -14,6 +14,10 @@
#include <asm/mipsregs.h>
+#ifndef IO_SPACE_LIMIT
+#define IO_SPACE_LIMIT 0xffff
+#endif
+
/*
* This gives the physical RAM offset.
*/
diff --git a/arch/mips/include/asm/mach-loongson64/spaces.h b/arch/mips/include/asm/mach-loongson64/spaces.h
index 3de0ac9d8829..ce04e998a37b 100644
--- a/arch/mips/include/asm/mach-loongson64/spaces.h
+++ b/arch/mips/include/asm/mach-loongson64/spaces.h
@@ -11,8 +11,7 @@
#define PCI_IOSIZE SZ_16M
#define MAP_BASE (PCI_IOBASE + PCI_IOSIZE)
-/* Reserved at the start of PCI_IOBASE for legacy drivers */
-#define MMIO_LOWER_RESERVED 0x10000
+#define IO_SPACE_LIMIT (PCI_IOSIZE - 1)
#include <asm/mach-generic/spaces.h>
#endif
--
2.28.0.rc1
Although currently we're not enabling any ISA device in devicetree,
but this node is required to express the ranges of address reserved
for ISA.
Signed-off-by: Jiaxun Yang <[email protected]>
---
arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
index 1c286bb8c703..e574a062dfae 100644
--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -367,5 +367,12 @@ pci_bridge@14,0 {
interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
};
};
+
+ isa {
+ compatible = "isa";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <1 0 0 0x18000000 0x20000>;
+ };
};
};
--
2.28.0.rc1