This series are based on 5.8-rc1 and we provide four i2c patches
to support mt8192 SoC.
Main changes compared to v2:
--delete unused I2C_DMA_4G_MODE
Main changes compared to v1:
--modify the commit with access more than 8GB dram
--add Reviewed-by and Acked-by from Yingjoe, Matthias and Rob
Qii Wang (4):
i2c: mediatek: Add apdma sync in i2c driver
i2c: mediatek: Add access to more than 8GB dram in i2c driver
dt-bindings: i2c: update bindings for MT8192 SoC
i2c: mediatek: Add i2c compatible for MediaTek MT8192
.../devicetree/bindings/i2c/i2c-mt65xx.txt | 1 +
drivers/i2c/busses/i2c-mt65xx.c | 77 +++++++++++++++-------
2 files changed, 53 insertions(+), 25 deletions(-)
--
1.9.1
With the apdma remove hand-shake signal, it need to keep i2c and
apdma in sync manually.
Reviewed-by: Yingjoe Chen <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
Signed-off-by: Qii Wang <[email protected]>
---
drivers/i2c/busses/i2c-mt65xx.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index deef69e..e6b984a 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -48,6 +48,9 @@
#define I2C_DMA_CON_TX 0x0000
#define I2C_DMA_CON_RX 0x0001
+#define I2C_DMA_ASYNC_MODE 0x0004
+#define I2C_DMA_SKIP_CONFIG 0x0010
+#define I2C_DMA_DIR_CHANGE 0x0200
#define I2C_DMA_START_EN 0x0001
#define I2C_DMA_INT_FLAG_NONE 0x0000
#define I2C_DMA_CLR_FLAG 0x0000
@@ -205,6 +208,7 @@ struct mtk_i2c_compatible {
unsigned char timing_adjust: 1;
unsigned char dma_sync: 1;
unsigned char ltiming_adjust: 1;
+ unsigned char apdma_sync: 1;
};
struct mtk_i2c_ac_timing {
@@ -311,6 +315,7 @@ struct i2c_spec_values {
.timing_adjust = 1,
.dma_sync = 0,
.ltiming_adjust = 0,
+ .apdma_sync = 0,
};
static const struct mtk_i2c_compatible mt6577_compat = {
@@ -324,6 +329,7 @@ struct i2c_spec_values {
.timing_adjust = 0,
.dma_sync = 0,
.ltiming_adjust = 0,
+ .apdma_sync = 0,
};
static const struct mtk_i2c_compatible mt6589_compat = {
@@ -337,6 +343,7 @@ struct i2c_spec_values {
.timing_adjust = 0,
.dma_sync = 0,
.ltiming_adjust = 0,
+ .apdma_sync = 0,
};
static const struct mtk_i2c_compatible mt7622_compat = {
@@ -350,6 +357,7 @@ struct i2c_spec_values {
.timing_adjust = 0,
.dma_sync = 0,
.ltiming_adjust = 0,
+ .apdma_sync = 0,
};
static const struct mtk_i2c_compatible mt8173_compat = {
@@ -362,6 +370,7 @@ struct i2c_spec_values {
.timing_adjust = 0,
.dma_sync = 0,
.ltiming_adjust = 0,
+ .apdma_sync = 0,
};
static const struct mtk_i2c_compatible mt8183_compat = {
@@ -375,6 +384,7 @@ struct i2c_spec_values {
.timing_adjust = 1,
.dma_sync = 1,
.ltiming_adjust = 1,
+ .apdma_sync = 0,
};
static const struct of_device_id mtk_i2c_of_match[] = {
@@ -798,6 +808,7 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
u16 start_reg;
u16 control_reg;
u16 restart_flag = 0;
+ u16 dma_sync = 0;
u32 reg_4g_mode;
u8 *dma_rd_buf = NULL;
u8 *dma_wr_buf = NULL;
@@ -851,10 +862,16 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
mtk_i2c_writew(i2c, num, OFFSET_TRANSAC_LEN);
}
+ if (i2c->dev_comp->apdma_sync) {
+ dma_sync = I2C_DMA_SKIP_CONFIG | I2C_DMA_ASYNC_MODE;
+ if (i2c->op == I2C_MASTER_WRRD)
+ dma_sync |= I2C_DMA_DIR_CHANGE;
+ }
+
/* Prepare buffer data to start transfer */
if (i2c->op == I2C_MASTER_RD) {
writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG);
- writel(I2C_DMA_CON_RX, i2c->pdmabase + OFFSET_CON);
+ writel(I2C_DMA_CON_RX | dma_sync, i2c->pdmabase + OFFSET_CON);
dma_rd_buf = i2c_get_dma_safe_msg_buf(msgs, 1);
if (!dma_rd_buf)
@@ -877,7 +894,7 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
writel(msgs->len, i2c->pdmabase + OFFSET_RX_LEN);
} else if (i2c->op == I2C_MASTER_WR) {
writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG);
- writel(I2C_DMA_CON_TX, i2c->pdmabase + OFFSET_CON);
+ writel(I2C_DMA_CON_TX | dma_sync, i2c->pdmabase + OFFSET_CON);
dma_wr_buf = i2c_get_dma_safe_msg_buf(msgs, 1);
if (!dma_wr_buf)
@@ -900,7 +917,7 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN);
} else {
writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_INT_FLAG);
- writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_CON);
+ writel(I2C_DMA_CLR_FLAG | dma_sync, i2c->pdmabase + OFFSET_CON);
dma_wr_buf = i2c_get_dma_safe_msg_buf(msgs, 1);
if (!dma_wr_buf)
--
1.9.1
Add a DT binding documentation for the MT8192 soc.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Qii Wang <[email protected]>
---
Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
index 88b71c1..7f0194f 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
@@ -14,6 +14,7 @@ Required properties:
"mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629
"mediatek,mt8173-i2c": for MediaTek MT8173
"mediatek,mt8183-i2c": for MediaTek MT8183
+ "mediatek,mt8192-i2c": for MediaTek MT8192
"mediatek,mt8516-i2c", "mediatek,mt2712-i2c": for MediaTek MT8516
- reg: physical base address of the controller and dma base, length of memory
mapped region.
--
1.9.1
Add i2c compatible for MT8192. Compare to MT8183 i2c controller,
MT8192 support more then 8GB DMA mode.
Signed-off-by: Qii Wang <[email protected]>
---
drivers/i2c/busses/i2c-mt65xx.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 463860e..e889f74 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -386,6 +386,20 @@ struct i2c_spec_values {
.max_dma_support = 33,
};
+static const struct mtk_i2c_compatible mt8192_compat = {
+ .quirks = &mt8183_i2c_quirks,
+ .regs = mt_i2c_regs_v2,
+ .pmic_i2c = 0,
+ .dcm = 0,
+ .auto_restart = 1,
+ .aux_len_reg = 1,
+ .timing_adjust = 1,
+ .dma_sync = 1,
+ .ltiming_adjust = 1,
+ .apdma_sync = 1,
+ .max_dma_support = 36,
+};
+
static const struct of_device_id mtk_i2c_of_match[] = {
{ .compatible = "mediatek,mt2712-i2c", .data = &mt2712_compat },
{ .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat },
@@ -393,6 +407,7 @@ struct i2c_spec_values {
{ .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat },
{ .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
{ .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
+ { .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
{}
};
MODULE_DEVICE_TABLE(of, mtk_i2c_of_match);
--
1.9.1
On Wed, Aug 05, 2020 at 06:52:18PM +0800, Qii Wang wrote:
> This series are based on 5.8-rc1 and we provide four i2c patches
> to support mt8192 SoC.
>
> Main changes compared to v2:
> --delete unused I2C_DMA_4G_MODE
>
> Main changes compared to v1:
> --modify the commit with access more than 8GB dram
> --add Reviewed-by and Acked-by from Yingjoe, Matthias and Rob
>
> Qii Wang (4):
> i2c: mediatek: Add apdma sync in i2c driver
> i2c: mediatek: Add access to more than 8GB dram in i2c driver
> dt-bindings: i2c: update bindings for MT8192 SoC
> i2c: mediatek: Add i2c compatible for MediaTek MT8192
>
> .../devicetree/bindings/i2c/i2c-mt65xx.txt | 1 +
Applied to for-next, thanks!
Sidenote: I get these warnings when compiling the driver:
drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_low_ns' not described in 'i2c_spec_values'
drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_high_ns' not described in 'i2c_spec_values'
drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_su_sta_ns' not described in 'i2c_spec_values'
drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'max_hd_dat_ns' not described in 'i2c_spec_values'
drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_su_dat_ns' not described in 'i2c_spec_values'
Is someone interested to fix these?
On 05/08/2020 23:42, [email protected] wrote:
> On Wed, Aug 05, 2020 at 06:52:18PM +0800, Qii Wang wrote:
>> This series are based on 5.8-rc1 and we provide four i2c patches
>> to support mt8192 SoC.
>>
>> Main changes compared to v2:
>> --delete unused I2C_DMA_4G_MODE
>>
>> Main changes compared to v1:
>> --modify the commit with access more than 8GB dram
>> --add Reviewed-by and Acked-by from Yingjoe, Matthias and Rob
>>
>> Qii Wang (4):
>> i2c: mediatek: Add apdma sync in i2c driver
>> i2c: mediatek: Add access to more than 8GB dram in i2c driver
>> dt-bindings: i2c: update bindings for MT8192 SoC
>> i2c: mediatek: Add i2c compatible for MediaTek MT8192
>>
>> .../devicetree/bindings/i2c/i2c-mt65xx.txt | 1 +
>
> Applied to for-next, thanks!
>
> Sidenote: I get these warnings when compiling the driver:
>
> drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_low_ns' not described in 'i2c_spec_values'
> drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_high_ns' not described in 'i2c_spec_values'
> drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_su_sta_ns' not described in 'i2c_spec_values'
> drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'max_hd_dat_ns' not described in 'i2c_spec_values'
> drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_su_dat_ns' not described in 'i2c_spec_values'
>
> Is someone interested to fix these?
>
I just send a fix for that.
Regards,
Matthias