2020-08-15 22:03:23

by Martin Blumenstingl

Subject: [PATCH] ARM: dts: meson: move the L2 cache-controller inside the SoC node

All IO mapped SoC peripherals should be within the "soc" node. Move the
L2 cache-controller there as well since it's the only one not following
this pattern.

Signed-off-by: Martin Blumenstingl <[email protected]>
---
arch/arm/boot/dts/meson.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
index eadb0832bcfc..7649dd1e0b9e 100644
--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
@@ -11,13 +11,6 @@ / {
#size-cells = <1>;
interrupt-parent = <&gic>;

- L2: cache-controller@c4200000 {
- compatible = "arm,pl310-cache";
- reg = <0xc4200000 0x1000>;
- cache-unified;
- cache-level = <2>;
- };
-
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -172,6 +165,13 @@ timer_abcde: timer@9940 {
};
};

+ L2: cache-controller@c4200000 {
+ compatible = "arm,pl310-cache";
+ reg = <0xc4200000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
periph: bus@c4300000 {
compatible = "simple-bus";
reg = <0xc4300000 0x10000>;
--
2.28.0

2020-08-24 21:16:44

by Kevin Hilman

Subject: Re: [PATCH] ARM: dts: meson: move the L2 cache-controller inside the SoC node

Martin Blumenstingl <[email protected]> writes:

> All IO mapped SoC peripherals should be within the "soc" node. Move the
> L2 cache-controller there as well since it's the only one not following
> this pattern.
>
> Signed-off-by: Martin Blumenstingl <[email protected]>

Boot tested on meson8b-odroidc1

Tested-by: Kevin Hilman <[email protected]>

Queuing for v5.10.

Thanks,

Kevin

2020-08-24 21:18:44

by Kevin Hilman

Subject: Re: [PATCH] ARM: dts: meson: move the L2 cache-controller inside the SoC node

On Sat, 15 Aug 2020 20:22:23 +0200, Martin Blumenstingl wrote:
> All IO mapped SoC peripherals should be within the "soc" node. Move the
> L2 cache-controller there as well since it's the only one not following
> this pattern.

Applied, thanks!

[1/1] ARM: dts: meson: move the L2 cache-controller inside the SoC node
commit: 8bcbcdb7293cc24eb7b24b67ef2b29b3a45a49e0

Best regards,
--
Kevin Hilman <[email protected]>