2020-08-16 20:27:03

by Prabhakar Mahadev Lad

[permalink] [raw]
Subject: [PATCH 0/3] r8a7742-iwg21m enable RTC and NOR flash

Hi All,

This series enables RTC and SPI NOR found on r8a7742-iwg21m
SoM.

Cheers,
Prabhakar

Lad Prabhakar (3):
ARM: dts: r8a7742-iwg21m: Sort the nodes alphabetically
ARM: dts: r8a7742-iwg21m: Add RTC support
ARM: dts: r8a7742-iwg21m: Add SPI NOR support

arch/arm/boot/dts/r8a7742-iwg21m.dtsi | 62 +++++++++++++++++++++++++--
1 file changed, 58 insertions(+), 4 deletions(-)

--
2.17.1


2020-08-16 20:33:00

by Prabhakar Mahadev Lad

[permalink] [raw]
Subject: [PATCH 3/3] ARM: dts: r8a7742-iwg21m: Add SPI NOR support

Add support for the SPI NOR device used to boot up the system
to the System on Module DT.

Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
---
arch/arm/boot/dts/r8a7742-iwg21m.dtsi | 34 +++++++++++++++++++++++++++
1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742-iwg21m.dtsi b/arch/arm/boot/dts/r8a7742-iwg21m.dtsi
index 0f26807f92b8..db8301331d31 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21m.dtsi
+++ b/arch/arm/boot/dts/r8a7742-iwg21m.dtsi
@@ -35,6 +35,16 @@
clock-frequency = <20000000>;
};

+&gpio0 {
+ /* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
+ qspi_en {
+ gpio-hog;
+ gpios = <18 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "QSPI_EN";
+ };
+};
+
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
@@ -70,4 +80,28 @@
groups = "mmc1_data4", "mmc1_ctrl";
function = "mmc1";
};
+
+ qspi_pins: qspi {
+ groups = "qspi_ctrl", "qspi_data2";
+ function = "qspi";
+ };
+};
+
+&qspi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ /* WARNING - This device contains the bootloader. Handle with care. */
+ flash: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "sst,sst25vf016b", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+ };
};
--
2.17.1

2020-08-16 22:20:23

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH 3/3] ARM: dts: r8a7742-iwg21m: Add SPI NOR support

Hi Lad,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on renesas-devel/next]
[also build test ERROR on v5.8 next-20200814]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Lad-Prabhakar/r8a7742-iwg21m-enable-RTC-and-NOR-flash/20200817-033555
base: https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

>> Error: arch/arm/boot/dts/r8a7742-iwg21m.dtsi:90.1-6 Label or path qspi not found
>> FATAL ERROR: Syntax error parsing input tree

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]


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2020-08-21 13:36:43

by Geert Uytterhoeven

[permalink] [raw]
Subject: Re: [PATCH 3/3] ARM: dts: r8a7742-iwg21m: Add SPI NOR support

Hi Prabhakar,

On Sun, Aug 16, 2020 at 9:33 PM Lad Prabhakar
<[email protected]> wrote:
> Add support for the SPI NOR device used to boot up the system
> to the System on Module DT.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Chris Paterson <[email protected]>

Thanks for your patch!

> --- a/arch/arm/boot/dts/r8a7742-iwg21m.dtsi
> +++ b/arch/arm/boot/dts/r8a7742-iwg21m.dtsi

> @@ -70,4 +80,28 @@
> groups = "mmc1_data4", "mmc1_ctrl";
> function = "mmc1";
> };
> +
> + qspi_pins: qspi {
> + groups = "qspi_ctrl", "qspi_data2";
> + function = "qspi";
> + };
> +};
> +
> +&qspi {
> + pinctrl-0 = <&qspi_pins>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +
> + /* WARNING - This device contains the bootloader. Handle with care. */
> + flash: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;

#{address,size}-cells are not needed, unless you list legacy partitions
(i.e. partitions not contained in a "partitions" container).

> + compatible = "sst,sst25vf016b", "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <50000000>;
> + m25p,fast-read;
> + spi-cpol;
> + spi-cpha;

Perhaps you want to add the partition layout, too?

> + };
> };

With the above fixed/clarified:
Reviewed-by: Geert Uytterhoeven <[email protected]>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

2020-08-21 14:03:51

by Lad, Prabhakar

[permalink] [raw]
Subject: Re: [PATCH 3/3] ARM: dts: r8a7742-iwg21m: Add SPI NOR support

Hi Geert,

Thank you for the review.

On Fri, Aug 21, 2020 at 2:33 PM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Prabhakar,
>
> On Sun, Aug 16, 2020 at 9:33 PM Lad Prabhakar
> <[email protected]> wrote:
> > Add support for the SPI NOR device used to boot up the system
> > to the System on Module DT.
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
> > Reviewed-by: Chris Paterson <[email protected]>
>
> Thanks for your patch!
>
> > --- a/arch/arm/boot/dts/r8a7742-iwg21m.dtsi
> > +++ b/arch/arm/boot/dts/r8a7742-iwg21m.dtsi
>
> > @@ -70,4 +80,28 @@
> > groups = "mmc1_data4", "mmc1_ctrl";
> > function = "mmc1";
> > };
> > +
> > + qspi_pins: qspi {
> > + groups = "qspi_ctrl", "qspi_data2";
> > + function = "qspi";
> > + };
> > +};
> > +
> > +&qspi {
> > + pinctrl-0 = <&qspi_pins>;
> > + pinctrl-names = "default";
> > +
> > + status = "okay";
> > +
> > + /* WARNING - This device contains the bootloader. Handle with care. */
> > + flash: flash@0 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
>
> #{address,size}-cells are not needed, unless you list legacy partitions
> (i.e. partitions not contained in a "partitions" container).
>
Agreed will drop it.

> > + compatible = "sst,sst25vf016b", "jedec,spi-nor";
> > + reg = <0>;
> > + spi-max-frequency = <50000000>;
> > + m25p,fast-read;
> > + spi-cpol;
> > + spi-cpha;
>
> Perhaps you want to add the partition layout, too?
>
will do.

> > + };
> > };
>
> With the above fixed/clarified:
> Reviewed-by: Geert Uytterhoeven <[email protected]>
>
Thank you. I shall post this lone patch fixing the above.

Cheers,
Prabhakar

> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds