2020-09-03 10:16:13

by Andy Duan

Subject: [PATCH 1/1] ARM: dts: imx6sx: fix the pad QSPI1B_SCLK mux mode for uart3

From: Fugang Duan <[email protected]>

The pad QSPI1B_SCLK mux mode 0x1 is for function UART3_DTE_TX,
correct the mux mode.

Fixes: 743636f25f1d ("ARM: dts: imx: add pin function header for imx6sx")
Signed-off-by: Fugang Duan <[email protected]>
---
arch/arm/boot/dts/imx6sx-pinfunc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6sx-pinfunc.h b/arch/arm/boot/dts/imx6sx-pinfunc.h
index 0b02c7e60c17..f4dc46207954 100644
--- a/arch/arm/boot/dts/imx6sx-pinfunc.h
+++ b/arch/arm/boot/dts/imx6sx-pinfunc.h
@@ -1026,7 +1026,7 @@
#define MX6SX_PAD_QSPI1B_DQS__SIM_M_HADDR_15 0x01B0 0x04F8 0x0000 0x7 0x0
#define MX6SX_PAD_QSPI1B_SCLK__QSPI1_B_SCLK 0x01B4 0x04FC 0x0000 0x0 0x0
#define MX6SX_PAD_QSPI1B_SCLK__UART3_DCE_RX 0x01B4 0x04FC 0x0840 0x1 0x4
-#define MX6SX_PAD_QSPI1B_SCLK__UART3_DTE_TX 0x01B4 0x04FC 0x0000 0x0 0x0
+#define MX6SX_PAD_QSPI1B_SCLK__UART3_DTE_TX 0x01B4 0x04FC 0x0000 0x1 0x0
#define MX6SX_PAD_QSPI1B_SCLK__ECSPI3_SCLK 0x01B4 0x04FC 0x0730 0x2 0x1
#define MX6SX_PAD_QSPI1B_SCLK__ESAI_RX_HF_CLK 0x01B4 0x04FC 0x0780 0x3 0x2
#define MX6SX_PAD_QSPI1B_SCLK__CSI1_DATA_16 0x01B4 0x04FC 0x06DC 0x4 0x1
--
2.17.1

2020-09-05 07:58:20

by Shawn Guo

Subject: Re: [PATCH 1/1] ARM: dts: imx6sx: fix the pad QSPI1B_SCLK mux mode for uart3

On Thu, Sep 03, 2020 at 06:05:21PM +0800, [email protected] wrote:
> From: Fugang Duan <[email protected]>
>
> The pad QSPI1B_SCLK mux mode 0x1 is for function UART3_DTE_TX,
> correct the mux mode.
>
> Fixes: 743636f25f1d ("ARM: dts: imx: add pin function header for imx6sx")
> Signed-off-by: Fugang Duan <[email protected]>

Applied, thanks.