2020-09-04 20:03:12

by Martin Cerveny

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Subject: [PATCH 0/6] ARM: dts: sun8i: v3s: Enable video decoder

First patch extends cedrus capability to all decoders
because V3s missing MPEG2 decoder.

Next two patches add system control node (SRAM C1) and
next three patches add support for Cedrus VPU.

Best regards,
Martin

Martin Cerveny (6):
media: cedrus: Register all codecs as capability
dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s
compatibles
ARM: dts: sun8i: v3s: Add node for system control
media: cedrus: Add support for V3s
media: allwinner,sun4i-a10-video-engine: Add V3s compatible
ARM: dts: sun8i: v3s: Add video engine node

.../allwinner,sun4i-a10-video-engine.yaml | 1 +
.../allwinner,sun4i-a10-system-control.yaml | 6 ++++
arch/arm/boot/dts/sun8i-v3s.dtsi | 33 +++++++++++++++++++
drivers/staging/media/sunxi/cedrus/cedrus.c | 28 +++++++++++++++-
drivers/staging/media/sunxi/cedrus/cedrus.h | 2 ++
.../staging/media/sunxi/cedrus/cedrus_video.c | 2 ++
6 files changed, 71 insertions(+), 1 deletion(-)

--
2.17.1


2020-09-04 20:03:17

by Martin Cerveny

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Subject: [PATCH 4/6] media: cedrus: Add support for V3s

V3s video engine runs at lower speed and support video decoder
for H.264 and JPEG/MJPEG only.

Signed-off-by: Martin Cerveny <[email protected]>
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c
index 3fd9fd810..3c4fcef37 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c
@@ -506,6 +506,12 @@ static const struct cedrus_variant sun8i_h3_cedrus_variant = {
.mod_rate = 402000000,
};

+static const struct cedrus_variant sun8i_v3s_cedrus_variant = {
+ .capabilities = CEDRUS_CAPABILITY_UNTILED |
+ CEDRUS_CAPABILITY_H264_DEC,
+ .mod_rate = 297000000,
+};
+
static const struct cedrus_variant sun50i_a64_cedrus_variant = {
.capabilities = CEDRUS_CAPABILITY_UNTILED |
CEDRUS_CAPABILITY_MPEG2_DEC |
@@ -552,6 +558,10 @@ static const struct of_device_id cedrus_dt_match[] = {
.compatible = "allwinner,sun8i-h3-video-engine",
.data = &sun8i_h3_cedrus_variant,
},
+ {
+ .compatible = "allwinner,sun8i-v3s-video-engine",
+ .data = &sun8i_v3s_cedrus_variant,
+ },
{
.compatible = "allwinner,sun50i-a64-video-engine",
.data = &sun50i_a64_cedrus_variant,
--
2.17.1

2020-09-04 20:03:25

by Martin Cerveny

[permalink] [raw]
Subject: [PATCH 2/6] dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s compatibles

Allwinner V3s has system control similar to that in H3.
Add compatibles for system control with SRAM C1 region.

Signed-off-by: Martin Cerveny <[email protected]>
---
.../bindings/sram/allwinner,sun4i-a10-system-control.yaml | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
index f5825935f..9577d6c14 100644
--- a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
+++ b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml
@@ -33,6 +33,9 @@ properties:
- const: allwinner,sun4i-a10-system-control
- const: allwinner,sun8i-a23-system-control
- const: allwinner,sun8i-h3-system-control
+ - items:
+ - const: allwinner,sun8i-v3s-system-control
+ - const: allwinner,sun8i-h3-system-control
- const: allwinner,sun50i-a64-sram-controller
deprecated: true
- const: allwinner,sun50i-a64-system-control
@@ -86,6 +89,9 @@ patternProperties:
- items:
- const: allwinner,sun8i-h3-sram-c1
- const: allwinner,sun4i-a10-sram-c1
+ - items:
+ - const: allwinner,sun8i-v3s-sram-c1
+ - const: allwinner,sun4i-a10-sram-c1
- items:
- const: allwinner,sun50i-a64-sram-c1
- const: allwinner,sun4i-a10-sram-c1
--
2.17.1

2020-09-04 20:03:38

by Martin Cerveny

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Subject: [PATCH 1/6] media: cedrus: Register all codecs as capability

All codecs should have capabilities.
For example "Allwinner V3s" does not support "MPEG2".

Signed-off-by: Martin Cerveny <[email protected]>
---
drivers/staging/media/sunxi/cedrus/cedrus.c | 18 +++++++++++++++++-
drivers/staging/media/sunxi/cedrus/cedrus.h | 2 ++
.../staging/media/sunxi/cedrus/cedrus_video.c | 2 ++
3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c
index bc27f9430..3fd9fd810 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.c
@@ -474,42 +474,58 @@ static int cedrus_remove(struct platform_device *pdev)
}

static const struct cedrus_variant sun4i_a10_cedrus_variant = {
+ .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC |
+ CEDRUS_CAPABILITY_H264_DEC,
.mod_rate = 320000000,
};

static const struct cedrus_variant sun5i_a13_cedrus_variant = {
+ .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC |
+ CEDRUS_CAPABILITY_H264_DEC,
.mod_rate = 320000000,
};

static const struct cedrus_variant sun7i_a20_cedrus_variant = {
+ .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC |
+ CEDRUS_CAPABILITY_H264_DEC,
.mod_rate = 320000000,
};

static const struct cedrus_variant sun8i_a33_cedrus_variant = {
- .capabilities = CEDRUS_CAPABILITY_UNTILED,
+ .capabilities = CEDRUS_CAPABILITY_UNTILED |
+ CEDRUS_CAPABILITY_MPEG2_DEC |
+ CEDRUS_CAPABILITY_H264_DEC,
.mod_rate = 320000000,
};

static const struct cedrus_variant sun8i_h3_cedrus_variant = {
.capabilities = CEDRUS_CAPABILITY_UNTILED |
+ CEDRUS_CAPABILITY_MPEG2_DEC |
+ CEDRUS_CAPABILITY_H264_DEC |
CEDRUS_CAPABILITY_H265_DEC,
.mod_rate = 402000000,
};

static const struct cedrus_variant sun50i_a64_cedrus_variant = {
.capabilities = CEDRUS_CAPABILITY_UNTILED |
+ CEDRUS_CAPABILITY_MPEG2_DEC |
+ CEDRUS_CAPABILITY_H264_DEC |
CEDRUS_CAPABILITY_H265_DEC,
.mod_rate = 402000000,
};

static const struct cedrus_variant sun50i_h5_cedrus_variant = {
.capabilities = CEDRUS_CAPABILITY_UNTILED |
+ CEDRUS_CAPABILITY_MPEG2_DEC |
+ CEDRUS_CAPABILITY_H264_DEC |
CEDRUS_CAPABILITY_H265_DEC,
.mod_rate = 402000000,
};

static const struct cedrus_variant sun50i_h6_cedrus_variant = {
.capabilities = CEDRUS_CAPABILITY_UNTILED |
+ CEDRUS_CAPABILITY_MPEG2_DEC |
+ CEDRUS_CAPABILITY_H264_DEC |
CEDRUS_CAPABILITY_H265_DEC,
.quirks = CEDRUS_QUIRK_NO_DMA_OFFSET,
.mod_rate = 600000000,
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h
index 96765555a..b6032f40c 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus.h
+++ b/drivers/staging/media/sunxi/cedrus/cedrus.h
@@ -28,6 +28,8 @@

#define CEDRUS_CAPABILITY_UNTILED BIT(0)
#define CEDRUS_CAPABILITY_H265_DEC BIT(1)
+#define CEDRUS_CAPABILITY_H264_DEC BIT(2)
+#define CEDRUS_CAPABILITY_MPEG2_DEC BIT(3)

#define CEDRUS_QUIRK_NO_DMA_OFFSET BIT(0)

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
index 16d82309e..cb4aca5be 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
@@ -38,10 +38,12 @@ static struct cedrus_format cedrus_formats[] = {
{
.pixelformat = V4L2_PIX_FMT_MPEG2_SLICE,
.directions = CEDRUS_DECODE_SRC,
+ .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC,
},
{
.pixelformat = V4L2_PIX_FMT_H264_SLICE,
.directions = CEDRUS_DECODE_SRC,
+ .capabilities = CEDRUS_CAPABILITY_H264_DEC,
},
{
.pixelformat = V4L2_PIX_FMT_HEVC_SLICE,
--
2.17.1

2020-09-04 20:04:00

by Martin Cerveny

[permalink] [raw]
Subject: [PATCH 3/6] ARM: dts: sun8i: v3s: Add node for system control

Allwinner V3s has system control and SRAM C1 region similar to H3.

Signed-off-by: Martin Cerveny <[email protected]>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index e5312869c..3f18866fb 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -138,6 +138,29 @@
};
};

+ syscon: system-control@1c00000 {
+ compatible = "allwinner,sun8i-v3s-system-control",
+ "allwinner,sun8i-h3-system-control";
+ reg = <0x01c00000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_c: sram@1d00000 {
+ compatible = "mmio-sram";
+ reg = <0x01d00000 0x80000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x01d00000 0x80000>;
+
+ ve_sram: sram-section@0 {
+ compatible = "allwinner,sun8i-v3s-sram-c1",
+ "allwinner,sun4i-a10-sram-c1";
+ reg = <0x000000 0x80000>;
+ };
+ };
+ };
+
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-v3s-tcon";
reg = <0x01c0c000 0x1000>;
--
2.17.1

2020-09-04 20:04:32

by Martin Cerveny

[permalink] [raw]
Subject: [PATCH 5/6] media: allwinner,sun4i-a10-video-engine: Add V3s compatible

Allwinner V3s SoC contains video engine. Add compatible for it.

Signed-off-by: Martin Cerveny <[email protected]>
---
.../bindings/media/allwinner,sun4i-a10-video-engine.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml
index 4cc1a670c..08515c18c 100644
--- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml
+++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml
@@ -18,6 +18,7 @@ properties:
- allwinner,sun7i-a20-video-engine
- allwinner,sun8i-a33-video-engine
- allwinner,sun8i-h3-video-engine
+ - allwinner,sun8i-v3s-video-engine
- allwinner,sun50i-a64-video-engine
- allwinner,sun50i-h5-video-engine
- allwinner,sun50i-h6-video-engine
--
2.17.1

2020-09-04 20:05:00

by Martin Cerveny

[permalink] [raw]
Subject: [PATCH 6/6] ARM: dts: sun8i: v3s: Add video engine node

Allwinner V3S SoC has a video engine.
Add a node for it.

Signed-off-by: Martin Cerveny <[email protected]>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 3f18866fb..3fb01dc1a 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -195,6 +195,16 @@
};
};

+ video-codec@1c0e000 {
+ compatible = "allwinner,sun8i-v3s-video-engine";
+ reg = <0x01c0e000 0x1000>;
+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+ <&ccu CLK_DRAM_VE>;
+ clock-names = "ahb", "mod", "ram";
+ resets = <&ccu RST_BUS_VE>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ allwinner,sram = <&ve_sram 1>;
+ };

mmc0: mmc@1c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
--
2.17.1

2020-09-08 06:25:11

by Maxime Ripard

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Subject: Re: [PATCH 0/6] ARM: dts: sun8i: v3s: Enable video decoder

Hi,

On Fri, Sep 04, 2020 at 10:01:06PM +0200, Martin Cerveny wrote:
> First patch extends cedrus capability to all decoders
> because V3s missing MPEG2 decoder.
>
> Next two patches add system control node (SRAM C1) and
> next three patches add support for Cedrus VPU.

How was it tested?

Maxime


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2020-09-08 06:28:48

by Maxime Ripard

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Subject: Re: [PATCH 5/6] media: allwinner,sun4i-a10-video-engine: Add V3s compatible

On Fri, Sep 04, 2020 at 10:01:11PM +0200, Martin Cerveny wrote:
> Allwinner V3s SoC contains video engine. Add compatible for it.
>
> Signed-off-by: Martin Cerveny <[email protected]>

The prefix isn't the right one, it shouldn't be media: but dt-bindings: media: cedrus:

Maxime


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2020-09-08 16:46:07

by Martin Cerveny

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Subject: Re: [PATCH 0/6] ARM: dts: sun8i: v3s: Enable video decoder

Hello.

On Tue, 8 Sep 2020, Maxime Ripard wrote:
> On Fri, Sep 04, 2020 at 10:01:06PM +0200, Martin Cerveny wrote:
>> First patch extends cedrus capability to all decoders
>> because V3s missing MPEG2 decoder.
>>
>> Next two patches add system control node (SRAM C1) and
>> next three patches add support for Cedrus VPU.
>
> How was it tested?

On V3s with LCD and bootlin raw v4l2 api test:
- https://github.com/mcerveny/linux/tree/v3s_videocodec_v3
- https://github.com/mcerveny/v4l2-request-test

Regards.

2020-09-10 13:21:01

by Maxime Ripard

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Subject: Re: [PATCH 0/6] ARM: dts: sun8i: v3s: Enable video decoder

On Tue, Sep 08, 2020 at 06:44:06PM +0200, Martin Cerveny wrote:
> Hello.
>
> On Tue, 8 Sep 2020, Maxime Ripard wrote:
> > On Fri, Sep 04, 2020 at 10:01:06PM +0200, Martin Cerveny wrote:
> > > First patch extends cedrus capability to all decoders
> > > because V3s missing MPEG2 decoder.
> > >
> > > Next two patches add system control node (SRAM C1) and
> > > next three patches add support for Cedrus VPU.
> >
> > How was it tested?
>
> On V3s with LCD and bootlin raw v4l2 api test:
> - https://github.com/mcerveny/linux/tree/v3s_videocodec_v3
> - https://github.com/mcerveny/v4l2-request-test

Thanks. Can you put it in your cover letter in your next version?

Maxime


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