Hello,
This series exposes some devicetree properties for tuning sample phase
delay in the Aspeed SD/eMMC controllers. The relevant register was
introduced on the AST2600 and is present for both the SD/MMC controller
and the dedicated eMMC controller.
Please review!
Joel: If Rob's happy with the binding change can you take the dts patch
through the aspeed dt tree?
Cheers,
Andrew
Andrew Jeffery (3):
dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI
mmc: sdhci-of-aspeed: Expose data sample phase delay tuning
ARM: dts: tacoma: Add data sample phase delay for eMMC
.../devicetree/bindings/mmc/aspeed,sdhci.yaml | 8 +
arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 2 +
drivers/mmc/host/sdhci-of-aspeed.c | 137 +++++++++++++++++-
3 files changed, 142 insertions(+), 5 deletions(-)
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2.25.1