Note I haven't tested SM8150 recently, but DSI is almost identical to SM8250.
v2:
- added workaround for 5GHz max_rate overflowing in 32-bit builds
(based on robclark's suggestion)
- Updated Kconfig option to mention SM8250 and not just SM8150
Jonathan Marek (3):
drm/msm/dsi: remove unused clk_pre/clk_post in msm_dsi_dphy_timing
drm/msm/dsi: add DSI config for sm8150 and sm8250
drm/msm/dsi: add support for 7nm DSI PHY/PLL
.../devicetree/bindings/display/msm/dsi.txt | 6 +-
drivers/gpu/drm/msm/Kconfig | 8 +
drivers/gpu/drm/msm/Makefile | 2 +
drivers/gpu/drm/msm/dsi/dsi.h | 2 +
drivers/gpu/drm/msm/dsi/dsi.xml.h | 423 ++++++++
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 5 +-
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 2 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 102 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 6 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 255 +++++
drivers/gpu/drm/msm/dsi/pll/dsi_pll.c | 4 +
drivers/gpu/drm/msm/dsi/pll/dsi_pll.h | 10 +
drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c | 904 ++++++++++++++++++
13 files changed, 1724 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
create mode 100644 drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c
--
2.26.1
The clk_pre/clk_post values in shared_timings are used instead, and these
are unused.
Signed-off-by: Jonathan Marek <[email protected]>
Tested-by: Dmitry Baryshkov <[email protected]> (SM8250)
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
index ef8672d7b123..886a9e3b44b5 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
@@ -50,8 +50,6 @@ extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;
extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;
struct msm_dsi_dphy_timing {
- u32 clk_pre;
- u32 clk_post;
u32 clk_zero;
u32 clk_trail;
u32 clk_prepare;
--
2.26.1