2020-09-14 10:56:28

by Laurentiu Tudor

Subject: [PATCH 1/2] bus: fsl-mc: don't assume an iommu is always present

There are certain scenarios where an iommu is not present, e.g.
booting in a VM. Let's support these scenarios by dropping the
check.

Signed-off-by: Laurentiu Tudor <[email protected]>
---
drivers/bus/fsl-mc/fsl-mc-bus.c | 3 ---
1 file changed, 3 deletions(-)

diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
index b69794e7364d..b0449df117e8 100644
--- a/drivers/bus/fsl-mc/fsl-mc-bus.c
+++ b/drivers/bus/fsl-mc/fsl-mc-bus.c
@@ -908,9 +908,6 @@ static int fsl_mc_bus_probe(struct platform_device *pdev)
u32 mc_portal_size, mc_stream_id;
struct resource *plat_res;

- if (!iommu_present(&fsl_mc_bus_type))
- return -EPROBE_DEFER;
-
mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
if (!mc)
return -ENOMEM;
--
2.17.1

2020-09-14 10:57:31

by Laurentiu Tudor

Subject: [PATCH 2/2] bus: fsl-mc: MC control registers are not always available

As per the device tree binding, in certain scenarios such as
virtualization scenarios, the MC control registers are not
available so don't error out if they are not present.

Signed-off-by: Laurentiu Tudor <[email protected]>
---
drivers/bus/fsl-mc/fsl-mc-bus.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
index b0449df117e8..7345ecef93f8 100644
--- a/drivers/bus/fsl-mc/fsl-mc-bus.c
+++ b/drivers/bus/fsl-mc/fsl-mc-bus.c
@@ -915,11 +915,11 @@ static int fsl_mc_bus_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, mc);

plat_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- mc->fsl_mc_regs = devm_ioremap_resource(&pdev->dev, plat_res);
- if (IS_ERR(mc->fsl_mc_regs))
- return PTR_ERR(mc->fsl_mc_regs);
+ if (plat_res)
+ mc->fsl_mc_regs = devm_ioremap_resource(&pdev->dev, plat_res);

- if (IS_ENABLED(CONFIG_ACPI) && !dev_of_node(&pdev->dev)) {
+ if (mc->fsl_mc_regs && IS_ENABLED(CONFIG_ACPI) &&
+ !dev_of_node(&pdev->dev)) {
mc_stream_id = readl(mc->fsl_mc_regs + FSL_MC_FAPR);
/*
* HW ORs the PL and BMT bit, places the result in bit 15 of
--
2.17.1