Hi Tero/Nishanth,
This series adds USB2.0 support for the J7200 EVM.
Series is based on top of:
Faiz's MMC/SD support series
https://lore.kernel.org/lkml/[email protected]/
Lokesh's initial support series
https://patchwork.kernel.org/cover/11740039/
Vignesh's I2C support series
https://lore.kernel.org/patchwork/cover/1282152/
Vignesh's Hyperflash series
https://lore.kernel.org/patchwork/cover/1285326/
MUX binding cleanup
https://lore.kernel.org/lkml/[email protected]/
cheers,
-roger
Changelog:
v4:
- use single header file for MUX defines. drop WIZ from macro names.
v3:
- use 0x00 instead of 0x0 in device tree for consistency.
- update commit log for USB support patch.
v2:
- fixed warnings when built with W=2. Still one warning is present
as property name "dr_mode" by USB core contains underscore.
Kishon Vijay Abraham I (1):
arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane
function
Roger Quadros (5):
dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
arm64: dts: ti: k3-j7200-main: Add USB controller
arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
.../dts/ti/k3-j7200-common-proc-board.dts | 28 ++++++++++
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 51 +++++++++++++++++++
include/dt-bindings/mux/ti-serdes.h | 22 ++++++++
3 files changed, 101 insertions(+)
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
j7200 has on USB controller instance. Add that.
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 30 +++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 42f66b8dffa7..519e6f718363 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -331,4 +331,34 @@
no-1-8-v;
dma-coherent;
};
+
+ usbss0: cdns-usb@4104000 {
+ compatible = "ti,j721e-usb";
+ reg = <0x00 0x4104000 0x00 0x100>;
+ dma-coherent;
+ power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 288 12>, <&k3_clks 288 3>;
+ clock-names = "ref", "lpm";
+ assigned-clocks = <&k3_clks 288 12>; /* USB2_REFCLK */
+ assigned-clock-parents = <&k3_clks 288 13>; /* HFOSC0 */
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ usb0: usb@6000000 {
+ compatible = "cdns,usb3";
+ reg = <0x00 0x6000000 0x00 0x10000>,
+ <0x00 0x6010000 0x00 0x10000>,
+ <0x00 0x6020000 0x00 0x10000>;
+ reg-names = "otg", "xhci", "dev";
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
+ interrupt-names = "host",
+ "peripheral",
+ "otg";
+ maximum-speed = "super-speed";
+ dr_mode = "otg";
+ };
+ };
};
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
From: Kishon Vijay Abraham I <[email protected]>
First two lanes of SERDES is connected to PCIe, third lane is
connected to QSGMII and the last lane is connected to USB. However,
Cadence torrent SERDES doesn't support more than 2 protocols
at the same time. Configure it only for PCIe and QSGMII.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 8e534ef8a3f5..6ab9d5d33a72 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "k3-j7200-som-p0.dtsi"
+#include <dt-bindings/mux/ti-serdes.h>
/ {
chosen {
@@ -139,3 +140,8 @@
ti,driver-strength-ohm = <50>;
disable-wp;
};
+
+&serdes_ln_ctrl {
+ idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>,
+ <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>;
+};
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
The SERDES lane control mux registers are present in the
CTRLMMR space.
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 1702ac0bbf40..d6d688efc32a 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -18,6 +18,21 @@
};
};
+ scm_conf: scm-conf@100000 {
+ compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
+ reg = <0x00 0x00100000 0x00 0x1c000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0x00100000 0x1c000>;
+
+ serdes_ln_ctrl: serdes-ln-ctrl@4080 {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
+ <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */
+ };
+ };
+
gic500: interrupt-controller@1800000 {
compatible = "arm,gic-v3";
#address-cells = <2>;
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
On 9/21/20 8:09 PM, Roger Quadros wrote:
> Hi Tero/Nishanth,
>
> This series adds USB2.0 support for the J7200 EVM.
[...]
> Kishon Vijay Abraham I (1):
> arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane
> function
>
> Roger Quadros (5):
> dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
> arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
> arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
> arm64: dts: ti: k3-j7200-main: Add USB controller
> arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
>
> .../dts/ti/k3-j7200-common-proc-board.dts | 28 ++++++++++
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 51 +++++++++++++++++++
> include/dt-bindings/mux/ti-serdes.h | 22 ++++++++
> 3 files changed, 101 insertions(+)
>
For the series:
Reviewed-by: Vignesh Raghavendra <[email protected]>
On 17:39-20200921, Roger Quadros wrote:
> Hi Tero/Nishanth,
>
> This series adds USB2.0 support for the J7200 EVM.
>
> Series is based on top of:
>
> Faiz's MMC/SD support series
> https://lore.kernel.org/lkml/[email protected]/
> Lokesh's initial support series
> https://patchwork.kernel.org/cover/11740039/
> Vignesh's I2C support series
> https://lore.kernel.org/patchwork/cover/1282152/
> Vignesh's Hyperflash series
> https://lore.kernel.org/patchwork/cover/1285326/
> MUX binding cleanup
> https://lore.kernel.org/lkml/[email protected]/
>
> cheers,
> -roger
Your series does'nt apply on my tree anymore - even after merging
ti-k3-dt-fixes-for-v5.9 . Could you rebase your patches on top of
next-20200930 ?
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D