Subject: [PATCH v2 0/7] Add support for Adreno 508/509/512

From: AngeloGioacchino Del Regno <[email protected]>

In this patch series, we are adding support for lower end Adreno 5
series GPUs, such as A508, A509 and A512 that we have found in the
Qualcomm SDM630, SDM636 and SDM660 SoCs.

On a note, adding support for these three units, also adds 99% of
the required "things" for another two GPUs, A505 and A506 but, even
if adding them requires literally two lines of code, noone of us has
got any SoC equipped with these ones hence we wouldn't be able to
test. Even though there is basically no reason for them to not work
correctly, kernel side, I chose to avoid adding the two "magic" lines.

Anyway, this patchset also addresses some issues that we've found in
the A5XX part of the Adreno driver, regarding a logic mistake in one
of the VPC protect values and a forced overwrite of the register named
A5XX_PC_DBG_ECO_CNTL, forcing the setting of vtxFifo and primFifo
thresholds that was valid only for higher end GPUs.

This patch series has been tested on the following devices:
- Sony Xperia XA2 Ultra (SDM630 Nile Discovery)
- Sony Xperia 10 (SDM630 Ganges Kirin)
- Sony Xperia 10 Plus (SDM636 Ganges Mermaid)

Changes in v2:
- Define REG_A5XX_UCHE_MODE_CNTL and fix open-coded
REG_A5XX_VPC_DBG_ECO_CNTL in the all flat shading optimization
disablement commit, as requested by Rob Clark.

AngeloGioacchino Del Regno (4):
drm/msm/a5xx: Remove overwriting A5XX_PC_DBG_ECO_CNTL register
drm/msm/a5xx: Separate A5XX_PC_DBG_ECO_CNTL write from main branch
drm/msm/a5xx: Add support for Adreno 508, 509, 512 GPUs
drm/msm/a5xx: Reset VBIF before PC only on A510 and A530

Konrad Dybcio (3):
drm/msm/a5xx: Fix VPC protect value in gpu_write()
drm/msm/a5xx: Disable flat shading optimization
drm/msm/a5xx: Disable UCHE global filter

drivers/gpu/drm/msm/adreno/a5xx.xml.h | 2 +
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 195 ++++++++++++++++++---
drivers/gpu/drm/msm/adreno/a5xx_power.c | 4 +-
drivers/gpu/drm/msm/adreno/adreno_device.c | 60 +++++++
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 15 ++
5 files changed, 249 insertions(+), 27 deletions(-)

--
2.28.0


Subject: [PATCH v2 5/7] drm/msm/a5xx: Fix VPC protect value in gpu_write()

From: Konrad Dybcio <[email protected]>

The upstream API for some reason uses logbase2 instead of
just passing the argument as-is, whereas downstream CAF
kernel does the latter.

Hence, a mistake has been made when porting:
4 is the value that's supposed to be passed, but
log2(4) = 2. Changing the value to 16 (= 2^4) fixes
the issue.

Signed-off-by: Konrad Dybcio <[email protected]>
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 6163c3b61a69..448fded571d3 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -789,7 +789,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)

/* VPC */
gpu_write(gpu, REG_A5XX_CP_PROTECT(14), ADRENO_PROTECT_RW(0xE68, 8));
- gpu_write(gpu, REG_A5XX_CP_PROTECT(15), ADRENO_PROTECT_RW(0xE70, 4));
+ gpu_write(gpu, REG_A5XX_CP_PROTECT(15), ADRENO_PROTECT_RW(0xE70, 16));

/* UCHE */
gpu_write(gpu, REG_A5XX_CP_PROTECT(16), ADRENO_PROTECT_RW(0xE80, 16));
--
2.28.0