LinuxLists.cc - [PATCH 0/5] KVM: x86: Handle reserved CR4 bit interception in VMX

2020-09-30 04:20:28

Subject: [PATCH 0/5] KVM: x86: Handle reserved CR4 bit interception in VMX

This series stems from Lai's RFC patches to intercept LA57 and let the
guest own FSGSBASE[*]. Discussion and inspection revealed that KVM does
not handle the case where LA57 is supported in hardware but not exposed to
the guest. This is actually true for all CR4 bits, but LA57 is currently
the only bit that can be reserved and also owned by the guest. I have
a unit test for this that I'll post separately.

Intercepting LA57 was by far the easiest fix for the immedidate bug, and
is likely the right change in the long term as there's no justification
for letting the guest own LA57.

The middle three patches adjust VMX's CR4 guest/host mask to intercept
reserved bits. This required reworking CPUID updates to also refresh said
mask at the correct time.

The last past is Lai's, which let's the guest own FSGSBASE. This depends
on the reserved bit handling being in place.

Ran everything through unit tests, and ran the kernel's FSGSBASE selftests
in a VM.

[*] https://lkml.kernel.org/r/[email protected]

Lai Jiangshan (2):
KVM: x86: Intercept LA57 to inject #GP fault when it's reserved
KVM: x86: Let the guest own CR4.FSGSBASE

Sean Christopherson (3):
KVM: x86: Invoke vendor's vcpu_after_set_cpuid() after all common
updates
KVM: x86: Move call to update_exception_bitmap() into VMX code
KVM: VMX: Intercept guest reserved CR4 bits to inject #GP fault

arch/x86/kvm/cpuid.c | 6 +++---
arch/x86/kvm/kvm_cache_regs.h | 2 +-
arch/x86/kvm/vmx/vmx.c | 18 +++++++++++++-----
3 files changed, 17 insertions(+), 9 deletions(-)

--
2.28.0

2020-09-30 04:21:48

by Sean Christopherson

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Subject: [PATCH 4/5] KVM: VMX: Intercept guest reserved CR4 bits to inject #GP fault

Intercept CR4 bits that are guest reserved so that KVM correctly injects
a #GP fault if the guest attempts to set a reserved bit. If a feature
is supported by the CPU but is not exposed to the guest, and its
associated CR4 bit is not intercepted by KVM by default, then KVM will
fail to inject a #GP if the guest sets the CR4 bit without triggering
an exit, e.g. by toggling only the bit in question.

Note, KVM doesn't give the guest direct access to any CR4 bits that are
also dependent on guest CPUID. Yet.

Signed-off-by: Sean Christopherson <[email protected]>
---
arch/x86/kvm/vmx/vmx.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 223e070c48b2..4ff440e7518e 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -4037,13 +4037,16 @@ void vmx_set_constant_host_state(struct vcpu_vmx *vmx)

void set_cr4_guest_host_mask(struct vcpu_vmx *vmx)
{
- vmx->vcpu.arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS;
+ struct kvm_vcpu *vcpu = &vmx->vcpu;
+
+ vcpu->arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS &
+ ~vcpu->arch.cr4_guest_rsvd_bits;
if (!enable_ept)
- vmx->vcpu.arch.cr4_guest_owned_bits &= ~X86_CR4_PGE;
+ vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_PGE;
if (is_guest_mode(&vmx->vcpu))
- vmx->vcpu.arch.cr4_guest_owned_bits &=
- ~get_vmcs12(&vmx->vcpu)->cr4_guest_host_mask;
- vmcs_writel(CR4_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr4_guest_owned_bits);
+ vcpu->arch.cr4_guest_owned_bits &=
+ ~get_vmcs12(vcpu)->cr4_guest_host_mask;
+ vmcs_writel(CR4_GUEST_HOST_MASK, ~vcpu->arch.cr4_guest_owned_bits);
}

u32 vmx_pin_based_exec_ctrl(struct vcpu_vmx *vmx)
@@ -7233,6 +7236,8 @@ static void vmx_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
}
}

+ set_cr4_guest_host_mask(vmx);
+
/* Refresh #PF interception to account for MAXPHYADDR changes. */
update_exception_bitmap(vcpu);
}
--
2.28.0

2020-10-20 02:31:11

by Paolo Bonzini

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Subject: Re: [PATCH 0/5] KVM: x86: Handle reserved CR4 bit interception in VMX

On 30/09/20 06:16, Sean Christopherson wrote:
> This series stems from Lai's RFC patches to intercept LA57 and let the
> guest own FSGSBASE[*]. Discussion and inspection revealed that KVM does
> not handle the case where LA57 is supported in hardware but not exposed to
> the guest. This is actually true for all CR4 bits, but LA57 is currently
> the only bit that can be reserved and also owned by the guest. I have
> a unit test for this that I'll post separately.
>
> Intercepting LA57 was by far the easiest fix for the immedidate bug, and
> is likely the right change in the long term as there's no justification
> for letting the guest own LA57.
>
> The middle three patches adjust VMX's CR4 guest/host mask to intercept
> reserved bits. This required reworking CPUID updates to also refresh said
> mask at the correct time.
>
> The last past is Lai's, which let's the guest own FSGSBASE. This depends
> on the reserved bit handling being in place.
>
> Ran everything through unit tests, and ran the kernel's FSGSBASE selftests
> in a VM.
>
> [*] https://lkml.kernel.org/r/[email protected]
>
> Lai Jiangshan (2):
> KVM: x86: Intercept LA57 to inject #GP fault when it's reserved
> KVM: x86: Let the guest own CR4.FSGSBASE
>
> Sean Christopherson (3):
> KVM: x86: Invoke vendor's vcpu_after_set_cpuid() after all common
> updates
> KVM: x86: Move call to update_exception_bitmap() into VMX code
> KVM: VMX: Intercept guest reserved CR4 bits to inject #GP fault
>
> arch/x86/kvm/cpuid.c | 6 +++---
> arch/x86/kvm/kvm_cache_regs.h | 2 +-
> arch/x86/kvm/vmx/vmx.c | 18 +++++++++++++-----
> 3 files changed, 17 insertions(+), 9 deletions(-)
>

Queued, thanks.

Paolo

2020-10-20 11:07:07

by Paolo Bonzini

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