Hi David, Jakub,
Some Renesas EtherAVB variants support internal clock delay
configuration, which can add larger delays than the delays that are
typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or
"[rt]xc-skew-ps" properties).
Historically, the EtherAVB driver configured these delays based on the
"rgmii-*id" PHY mode. This caused issues with PHY drivers that
implement PHY internal delays properly[1]. Hence a backwards-compatible
workaround was added by masking the PHY mode[2].
This patch series implements the next step of the plan outlined in [3],
and adds proper support for explicit configuration of the MAC internal
clock delays using new "[rt]x-internal-delay-ps" properties. If none of
these properties is present, the driver falls back to the old handling.
This can be considered the MAC counterpart of commit 9150069bf5fc0e86
("dt-bindings: net: Add tx and rx internal delays"), which applies to
the PHY. Note that unlike commit 92252eec913b2dd5 ("net: phy: Add a
helper to return the index for of the internal delay"), no helpers are
provided to parse the DT properties, as so far there is a single user
only, which supports only zero or a single fixed value. Of course such
helpers can be added later, when the need arises, or when deemed useful
otherwise.
This series consists of 3 parts:
1. DT binding updates documenting the new properties, for both the
generic ethernet-controller and the EtherAVB-specific bindings,
2. Conversion to json-schema of the Renesas EtherAVB DT bindings.
Technically, the conversion is independent of all of the above.
I included it in this series, as it shows how all sanity checks on
"[rt]x-internal-delay-ps" values are implemented as DT binding
checks,
3. EtherAVB driver update implementing support for the new properties.
Given Rob has provided his acks for the DT binding updates, all of this
can be merged through net-next.
Changes compared to v3[4]:
- Add Reviewed-by,
- Drop the DT updates, as they will be merged through renesas-devel and
arm-soc, and have a hard dependency on this series.
Changes compared to v2[5]:
- Update recently added board DTS files,
- Add Reviewed-by.
Changes compared to v1[6]:
- Added "[PATCH 1/7] dt-bindings: net: ethernet-controller: Add
internal delay properties",
- Replace "renesas,[rt]xc-delay-ps" by "[rt]x-internal-delay-ps",
- Incorporated EtherAVB DT binding conversion to json-schema,
- Add Reviewed-by.
Impacted, tested:
- Salvator-X(S) with R-Car H3 ES1.0 and ES2.0, M3-W, and M3-N.
Not impacted, tested:
- Ebisu with R-Car E3.
Impacted, not tested:
- Salvator-X(S) with other SoC variants,
- ULCB with R-Car H3/M3-W/M3-N variants,
- V3MSK and Eagle with R-Car V3M,
- Draak with R-Car V3H,
- HiHope RZ/G2[MN] with RZ/G2M or RZ/G2N,
- Beacon EmbeddedWorks RZ/G2M Development Kit.
To ease testing, I have pushed this series and the DT updates to the
topic/ravb-internal-clock-delays-v4 branch of my renesas-drivers
repository at
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
Thanks for applying!
References:
[1] Commit bcf3440c6dd78bfe ("net: phy: micrel: add phy-mode support
for the KSZ9031 PHY")
[2] Commit 9b23203c32ee02cd ("ravb: Mask PHY mode to avoid inserting
delays twice").
https://lore.kernel.org/r/[email protected]/
[3] https://lore.kernel.org/r/CAMuHMdU+MR-2tr3-pH55G0GqPG9HwH3XUd=8HZxprFDMGQeWUw@mail.gmail.com/
[4] https://lore.kernel.org/linux-devicetree/[email protected]/
[5] https://lore.kernel.org/linux-devicetree/[email protected]/
[6] https://lore.kernel.org/linux-devicetree/[email protected]/
Geert Uytterhoeven (5):
dt-bindings: net: ethernet-controller: Add internal delay properties
dt-bindings: net: renesas,ravb: Document internal clock delay
properties
dt-bindings: net: renesas,etheravb: Convert to json-schema
ravb: Split delay handling in parsing and applying
ravb: Add support for explicit internal clock delay configuration
.../bindings/net/ethernet-controller.yaml | 14 +
.../bindings/net/renesas,etheravb.yaml | 261 ++++++++++++++++++
.../devicetree/bindings/net/renesas,ravb.txt | 134 ---------
drivers/net/ethernet/renesas/ravb.h | 5 +-
drivers/net/ethernet/renesas/ravb_main.c | 53 +++-
5 files changed, 320 insertions(+), 147 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/renesas,etheravb.yaml
delete mode 100644 Documentation/devicetree/bindings/net/renesas,ravb.txt
--
2.17.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Some EtherAVB variants support internal clock delay configuration, which
can add larger delays than the delays that are typically supported by
the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps"
properties).
Add properties for configuring the internal MAC delays.
These properties are mandatory, even when specified as zero, to
distinguish between old and new DTBs.
Update the (bogus) example accordingly.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Sergei Shtylyov <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
---
v4:
- Add Reviewed-by,
v3:
- Add Reviewed-by,
v2:
- Replace "renesas,[rt]xc-delay-ps" by "[rt]x-internal-delay-ps",
- Add "(bogus)" to the example update, to avoid people considering it
a one-to-one conversion.
---
.../devicetree/bindings/net/renesas,ravb.txt | 29 ++++++++++---------
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt
index 032b76f14f4fdb38..4a62dd11d5c488f4 100644
--- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
+++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
@@ -64,6 +64,18 @@ Optional properties:
AVB_LINK signal.
- renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is
active-low instead of normal active-high.
+- rx-internal-delay-ps: Internal RX clock delay.
+ This property is mandatory and valid only on R-Car Gen3
+ and RZ/G2 SoCs.
+ Valid values are 0 and 1800.
+ A non-zero value is allowed only if phy-mode = "rgmii".
+ Zero is not supported on R-Car D3.
+- tx-internal-delay-ps: Internal TX clock delay.
+ This property is mandatory and valid only on R-Car H3,
+ M3-W, M3-W+, M3-N, V3M, and V3H, and RZ/G2M and RZ/G2N.
+ Valid values are 0 and 2000.
+ A non-zero value is allowed only if phy-mode = "rgmii".
+ Zero is not supported on R-Car V3H.
Example:
@@ -105,8 +117,10 @@ Example:
"ch24";
clocks = <&cpg CPG_MOD 812>;
power-domains = <&cpg>;
- phy-mode = "rgmii-id";
+ phy-mode = "rgmii";
phy-handle = <&phy0>;
+ rx-internal-delay-ps = <0>;
+ tx-internal-delay-ps = <2000>;
pinctrl-0 = <ðer_pins>;
pinctrl-names = "default";
@@ -115,18 +129,7 @@ Example:
#size-cells = <0>;
phy0: ethernet-phy@0 {
- rxc-skew-ps = <900>;
- rxdv-skew-ps = <0>;
- rxd0-skew-ps = <0>;
- rxd1-skew-ps = <0>;
- rxd2-skew-ps = <0>;
- rxd3-skew-ps = <0>;
- txc-skew-ps = <900>;
- txen-skew-ps = <0>;
- txd0-skew-ps = <0>;
- txd1-skew-ps = <0>;
- txd2-skew-ps = <0>;
- txd3-skew-ps = <0>;
+ rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
--
2.17.1
Internal Receive and Transmit Clock Delays are a common setting for
RGMII capable devices.
While these delays are typically applied by the PHY, some MACs support
configuring internal clock delay settings, too. Hence add standardized
properties to configure this.
This is the MAC counterpart of commit 9150069bf5fc0e86 ("dt-bindings:
net: Add tx and rx internal delays"), which applies to the PHY.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
---
v4:
- Add Reviewed-by,
v3:
- Add Reviewed-by,
v2:
- New.
---
.../bindings/net/ethernet-controller.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
index 1c4474036d46a9dc..e9bb386066540676 100644
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
@@ -119,6 +119,13 @@ properties:
and is useful for determining certain configuration settings
such as flow control thresholds.
+ rx-internal-delay-ps:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ RGMII Receive Clock Delay defined in pico seconds.
+ This is used for controllers that have configurable RX internal delays.
+ If this property is present then the MAC applies the RX delay.
+
sfp:
$ref: /schemas/types.yaml#definitions/phandle
description:
@@ -130,6 +137,13 @@ properties:
The size of the controller\'s transmit fifo in bytes. This
is used for components that can have configurable fifo sizes.
+ tx-internal-delay-ps:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ RGMII Transmit Clock Delay defined in pico seconds.
+ This is used for controllers that have configurable TX internal delays.
+ If this property is present then the MAC applies the TX delay.
+
managed:
description:
Specifies the PHY management type. If auto is set and fixed-link
--
2.17.1
From: Geert Uytterhoeven <[email protected]>
Date: Thu, 1 Oct 2020 12:10:03 +0200
> Some Renesas EtherAVB variants support internal clock delay
> configuration, which can add larger delays than the delays that are
> typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or
> "[rt]xc-skew-ps" properties).
>
> Historically, the EtherAVB driver configured these delays based on the
> "rgmii-*id" PHY mode. This caused issues with PHY drivers that
> implement PHY internal delays properly[1]. Hence a backwards-compatible
> workaround was added by masking the PHY mode[2].
>
> This patch series implements the next step of the plan outlined in [3],
> and adds proper support for explicit configuration of the MAC internal
> clock delays using new "[rt]x-internal-delay-ps" properties. If none of
> these properties is present, the driver falls back to the old handling.
...
Series applied, thank you.