This series adds the CPG clock definitions, device node entries, and compatible
strings for the CSI-2 receivers and VIN instances on R8A779A0 R-Car V3U SoC.
A few quircks in the per-patches commit messages.
Compile tested only.
Jacopo Mondi (6):
clk: renesas: r8a779a0: Add CSI4[0-3] clocks
dt-bindings: media: renesas,csi2: Add V3U support
arm64: dts: renesas: r8a779a0: Add CSI-2 nodes
clk: renesas: r8a779a0: Add VIN[00-31] clocks
dt-bindings: media: renesas,vin: Add V3U support
arm64: dts: r8a779a0: Add VIN nodes
.../bindings/media/renesas,csi2.yaml | 1 +
.../bindings/media/renesas,vin.yaml | 1 +
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 361 ++++++++++++++++++
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 36 ++
4 files changed, 399 insertions(+)
--
2.28.0
Add VIN nodes to R8A779A0 R-Car V3U SoC.
Signed-off-by: Jacopo Mondi <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 320 ++++++++++++++++++++++
1 file changed, 320 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 83962ad30a1d..bc81e6a761d3 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -105,6 +105,326 @@ scif0: serial@e6e60000 {
status = "disabled";
};
+ vin0: video@e6ef0000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 730>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 730>;
+ status = "disabled";
+ };
+
+ vin1: video@e6ef1000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 731>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 731>;
+ status = "disabled";
+ };
+
+ vin2: video@e6ef2000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 800>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 800>;
+ status = "disabled";
+ };
+
+ vin3: video@e6ef3000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 801>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 801>;
+ status = "disabled";
+ };
+
+ vin4: video@e6ef4000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef4000 0 0x1000>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 802>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 802>;
+ status = "disabled";
+ };
+
+ vin5: video@e6ef5000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef5000 0 0x1000>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 803>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 803>;
+ status = "disabled";
+ };
+
+ vin6: video@e6ef6000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef6000 0 0x1000>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 804>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 804>;
+ status = "disabled";
+ };
+
+ vin7: video@e6ef7000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef7000 0 0x1000>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 805>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 805>;
+ status = "disabled";
+ };
+
+ vin8: video@e6ef8000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef8000 0 0x1000>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 806>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 806>;
+ status = "disabled";
+ };
+
+ vin9: video@e6ef9000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ef9000 0 0x1000>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 807>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 807>;
+ status = "disabled";
+ };
+
+ vin10: video@e6efa000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efa000 0 0x1000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
+ status = "disabled";
+ };
+
+ vin11: video@e6efb000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efb000 0 0x1000>;
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ status = "disabled";
+ };
+
+ vin12: video@e6efc000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efc000 0 0x1000>;
+ interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ status = "disabled";
+ };
+
+ vin13: video@e6efd000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efd000 0 0x1000>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ status = "disabled";
+ };
+
+ vin14: video@e6efe000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6efe000 0 0x1000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ status = "disabled";
+ };
+
+ vin15: video@e6eff000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6eff000 0 0x1000>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 813>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 813>;
+ status = "disabled";
+ };
+
+ vin16: video@e6ed0000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed0000 0 0x1000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 814>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 814>;
+ status = "disabled";
+ };
+
+ vin17: video@e6ed1000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed1000 0 0x1000>;
+ interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ status = "disabled";
+ };
+
+ vin18: video@e6ed2000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed2000 0 0x1000>;
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 816>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 816>;
+ status = "disabled";
+ };
+
+ vin19: video@e6ed3000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed3000 0 0x1000>;
+ interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 817>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 817>;
+ status = "disabled";
+ };
+
+ vin20: video@e6ed4000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed4000 0 0x1000>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 818>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 818>;
+ status = "disabled";
+ };
+
+ vin21: video@e6ed5000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed5000 0 0x1000>;
+ interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 819>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 819>;
+ status = "disabled";
+ };
+
+ vin22: video@e6ed6000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed6000 0 0x1000>;
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 820>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 820>;
+ status = "disabled";
+ };
+
+ vin23: video@e6ed7000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed7000 0 0x1000>;
+ interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 821>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 821>;
+ status = "disabled";
+ };
+
+ vin24: video@e6ed8000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed8000 0 0x1000>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 822>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 822>;
+ status = "disabled";
+ };
+
+ vin25: video@e6ed9000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ed9000 0 0x1000>;
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 823>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 823>;
+ status = "disabled";
+ };
+
+ vin26: video@e6eda000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6eda000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 824>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 824>;
+ status = "disabled";
+ };
+
+ vin27: video@e6edb000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6edb000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 825>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 825>;
+ status = "disabled";
+ };
+
+ vin28: video@e6edc000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6edc000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 826>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 826>;
+ status = "disabled";
+ };
+
+ vin29: video@e6edd000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6edd000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 827>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 827>;
+ status = "disabled";
+ };
+
+ vin30: video@e6ede000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6ede000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 828>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 828>;
+ status = "disabled";
+ };
+
+ vin31: video@e6edf000 {
+ compatible = "renesas,vin-r8a779a0";
+ reg = <0 0xe6edf000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 829>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 829>;
+ status = "disabled";
+ };
+
csi40: csi2@feaa0000 {
compatible = "renesas,r8a779a0-csi2";
reg = <0 0xfeaa0000 0 0x10000>;
--
2.28.0
Add compatible string definition for R-Car V3U.
Signed-off-by: Jacopo Mondi <[email protected]>
---
Documentation/devicetree/bindings/media/renesas,vin.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/media/renesas,vin.yaml b/Documentation/devicetree/bindings/media/renesas,vin.yaml
index ad2fe660364b..7b629a6ea035 100644
--- a/Documentation/devicetree/bindings/media/renesas,vin.yaml
+++ b/Documentation/devicetree/bindings/media/renesas,vin.yaml
@@ -51,6 +51,7 @@ properties:
- renesas,vin-r8a77980 # R-Car V3H
- renesas,vin-r8a77990 # R-Car E3
- renesas,vin-r8a77995 # R-Car D3
+ - renesas,vin-r8a779a0 # R-Car V3U
reg:
maxItems: 1
--
2.28.0
Add clock definitions of the VIN instances for R-Car V3U.
Signed-off-by: Jacopo Mondi <[email protected]>
---
Clocks at indexes 730 and 731 are named 'vin0' and 'vin1'.
I assumed it's a typographic error and renamed them 'vin00' and 'vin01'
---
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 32 +++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index bd54a28c50ee..2a00eb82013f 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -149,6 +149,38 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
DEF_MOD("scif4", 705, R8A779A0_CLK_S1D8),
+ DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin03", 801, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin04", 802, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin05", 803, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin06", 804, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin07", 805, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin10", 806, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin11", 807, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin12", 808, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin13", 809, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin14", 810, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin15", 811, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin16", 812, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin17", 813, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin20", 814, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin21", 815, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin22", 816, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin23", 817, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin24", 818, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin25", 819, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin26", 820, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin27", 821, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin30", 822, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin31", 823, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin32", 824, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin33", 825, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin34", 826, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
+ DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
};
static spinlock_t cpg_lock;
--
2.28.0
Hi Jacopo,
Thanks for your work.
On 2020-10-14 11:44:43 +0200, Jacopo Mondi wrote:
> Add VIN nodes to R8A779A0 R-Car V3U SoC.
>
> Signed-off-by: Jacopo Mondi <[email protected]>
> ---
> arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 320 ++++++++++++++++++++++
> 1 file changed, 320 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> index 83962ad30a1d..bc81e6a761d3 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -105,6 +105,326 @@ scif0: serial@e6e60000 {
> status = "disabled";
> };
>
> + vin0: video@e6ef0000 {
> + compatible = "renesas,vin-r8a779a0";
How is this tested? There is no driver support and the schema you added
the compat string to mandates the 'renesas,id' property for the vin
nodes. As far as I can tell the reason for this id is gone with the new
pipeline of the V3U. So I guess as long as we don't break dtschema
validation all is good, just wanted to make sure ;-)
> + reg = <0 0xe6ef0000 0 0x1000>;
> + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 730>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 730>;
> + status = "disabled";
> + };
> +
> + vin1: video@e6ef1000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef1000 0 0x1000>;
> + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 731>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 731>;
> + status = "disabled";
> + };
> +
> + vin2: video@e6ef2000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef2000 0 0x1000>;
> + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 800>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 800>;
> + status = "disabled";
> + };
> +
> + vin3: video@e6ef3000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef3000 0 0x1000>;
> + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 801>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 801>;
> + status = "disabled";
> + };
> +
> + vin4: video@e6ef4000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef4000 0 0x1000>;
> + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 802>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 802>;
> + status = "disabled";
> + };
> +
> + vin5: video@e6ef5000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef5000 0 0x1000>;
> + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 803>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 803>;
> + status = "disabled";
> + };
> +
> + vin6: video@e6ef6000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef6000 0 0x1000>;
> + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 804>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 804>;
> + status = "disabled";
> + };
> +
> + vin7: video@e6ef7000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef7000 0 0x1000>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 805>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 805>;
> + status = "disabled";
> + };
> +
> + vin8: video@e6ef8000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef8000 0 0x1000>;
> + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 806>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 806>;
> + status = "disabled";
> + };
> +
> + vin9: video@e6ef9000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ef9000 0 0x1000>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 807>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 807>;
> + status = "disabled";
> + };
> +
> + vin10: video@e6efa000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6efa000 0 0x1000>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 808>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 808>;
> + status = "disabled";
> + };
> +
> + vin11: video@e6efb000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6efb000 0 0x1000>;
> + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 809>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 809>;
> + status = "disabled";
> + };
> +
> + vin12: video@e6efc000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6efc000 0 0x1000>;
> + interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 810>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 810>;
> + status = "disabled";
> + };
> +
> + vin13: video@e6efd000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6efd000 0 0x1000>;
> + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 811>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 811>;
> + status = "disabled";
> + };
> +
> + vin14: video@e6efe000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6efe000 0 0x1000>;
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 812>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 812>;
> + status = "disabled";
> + };
> +
> + vin15: video@e6eff000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6eff000 0 0x1000>;
> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 813>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 813>;
> + status = "disabled";
> + };
> +
> + vin16: video@e6ed0000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed0000 0 0x1000>;
> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 814>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 814>;
> + status = "disabled";
> + };
> +
> + vin17: video@e6ed1000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed1000 0 0x1000>;
> + interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 815>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 815>;
> + status = "disabled";
> + };
> +
> + vin18: video@e6ed2000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed2000 0 0x1000>;
> + interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 816>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 816>;
> + status = "disabled";
> + };
> +
> + vin19: video@e6ed3000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed3000 0 0x1000>;
> + interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 817>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 817>;
> + status = "disabled";
> + };
> +
> + vin20: video@e6ed4000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed4000 0 0x1000>;
> + interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 818>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 818>;
> + status = "disabled";
> + };
> +
> + vin21: video@e6ed5000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed5000 0 0x1000>;
> + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 819>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 819>;
> + status = "disabled";
> + };
> +
> + vin22: video@e6ed6000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed6000 0 0x1000>;
> + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 820>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 820>;
> + status = "disabled";
> + };
> +
> + vin23: video@e6ed7000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed7000 0 0x1000>;
> + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 821>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 821>;
> + status = "disabled";
> + };
> +
> + vin24: video@e6ed8000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed8000 0 0x1000>;
> + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 822>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 822>;
> + status = "disabled";
> + };
> +
> + vin25: video@e6ed9000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ed9000 0 0x1000>;
> + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 823>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 823>;
> + status = "disabled";
> + };
> +
> + vin26: video@e6eda000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6eda000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 824>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 824>;
> + status = "disabled";
> + };
> +
> + vin27: video@e6edb000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6edb000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 825>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 825>;
> + status = "disabled";
> + };
> +
> + vin28: video@e6edc000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6edc000 0 0x1000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 826>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 826>;
> + status = "disabled";
> + };
> +
> + vin29: video@e6edd000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6edd000 0 0x1000>;
> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 827>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 827>;
> + status = "disabled";
> + };
> +
> + vin30: video@e6ede000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6ede000 0 0x1000>;
> + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 828>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 828>;
> + status = "disabled";
> + };
> +
> + vin31: video@e6edf000 {
> + compatible = "renesas,vin-r8a779a0";
> + reg = <0 0xe6edf000 0 0x1000>;
> + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 829>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 829>;
> + status = "disabled";
> + };
> +
> csi40: csi2@feaa0000 {
> compatible = "renesas,r8a779a0-csi2";
> reg = <0 0xfeaa0000 0 0x10000>;
> --
> 2.28.0
>
--
Regards,
Niklas S?derlund
Hi Niklas,
On Wed, Oct 14, 2020 at 12:11:52PM +0200, Niklas Söderlund wrote:
> Hi Jacopo,
>
> Thanks for your patch.
>
> On 2020-10-14 11:44:42 +0200, Jacopo Mondi wrote:
> > Add compatible string definition for R-Car V3U.
> >
> > Signed-off-by: Jacopo Mondi <[email protected]>
> > ---
> > Documentation/devicetree/bindings/media/renesas,vin.yaml | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/media/renesas,vin.yaml b/Documentation/devicetree/bindings/media/renesas,vin.yaml
> > index ad2fe660364b..7b629a6ea035 100644
> > --- a/Documentation/devicetree/bindings/media/renesas,vin.yaml
> > +++ b/Documentation/devicetree/bindings/media/renesas,vin.yaml
> > @@ -51,6 +51,7 @@ properties:
> > - renesas,vin-r8a77980 # R-Car V3H
> > - renesas,vin-r8a77990 # R-Car E3
> > - renesas,vin-r8a77995 # R-Car D3
> > + - renesas,vin-r8a779a0 # R-Car V3U
>
> Documenting the compat string here might give the wrong impression the
> IP is supported. Which it's not as the V3U is quiet different then the
> it's siblings. Whit a new pipeline and small but important changes in in
> the register set. I'm primarily thinking about that the IFMD register is
> gone and dealing with that will be quiet significant work in the driver.
>
> I'm not yet 100% sure the best idea is to support V3U with this driver,
> maybe it's finally time to make it more modular, with more distinct
> support for Gen2, Gen3 and a new module for V3U?
I see.
The first concern I had that had me adding this compatible string is
that otherwise I cannot specify any compatible string in the DTS
device nodes...
>
> >
> > reg:
> > maxItems: 1
> > --
> > 2.28.0
> >
>
> --
> Regards,
> Niklas Söderlund
Hi Niklas,
On Wed, Oct 14, 2020 at 12:19:50PM +0200, Niklas Söderlund wrote:
> Hi Jacopo,
>
> Thanks for your work.
>
> On 2020-10-14 11:44:43 +0200, Jacopo Mondi wrote:
> > Add VIN nodes to R8A779A0 R-Car V3U SoC.
> >
> > Signed-off-by: Jacopo Mondi <[email protected]>
> > ---
> > arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 320 ++++++++++++++++++++++
> > 1 file changed, 320 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> > index 83962ad30a1d..bc81e6a761d3 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> > @@ -105,6 +105,326 @@ scif0: serial@e6e60000 {
> > status = "disabled";
> > };
> >
> > + vin0: video@e6ef0000 {
> > + compatible = "renesas,vin-r8a779a0";
>
> How is this tested? There is no driver support and the schema you added
Compile tested as specified in the cover letter
> the compat string to mandates the 'renesas,id' property for the vin
I was sure 'renesas,id' was BSP stuff 0_0
> nodes. As far as I can tell the reason for this id is gone with the new
> pipeline of the V3U. So I guess as long as we don't break dtschema
> validation all is good, just wanted to make sure ;-)
>
Do you think we should limit adding CPG clock entries only ?
> > + reg = <0 0xe6ef0000 0 0x1000>;
> > + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 730>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 730>;
> > + status = "disabled";
> > + };
> > +
> > + vin1: video@e6ef1000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef1000 0 0x1000>;
> > + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 731>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 731>;
> > + status = "disabled";
> > + };
> > +
> > + vin2: video@e6ef2000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef2000 0 0x1000>;
> > + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 800>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 800>;
> > + status = "disabled";
> > + };
> > +
> > + vin3: video@e6ef3000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef3000 0 0x1000>;
> > + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 801>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 801>;
> > + status = "disabled";
> > + };
> > +
> > + vin4: video@e6ef4000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef4000 0 0x1000>;
> > + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 802>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 802>;
> > + status = "disabled";
> > + };
> > +
> > + vin5: video@e6ef5000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef5000 0 0x1000>;
> > + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 803>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 803>;
> > + status = "disabled";
> > + };
> > +
> > + vin6: video@e6ef6000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef6000 0 0x1000>;
> > + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 804>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 804>;
> > + status = "disabled";
> > + };
> > +
> > + vin7: video@e6ef7000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef7000 0 0x1000>;
> > + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 805>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 805>;
> > + status = "disabled";
> > + };
> > +
> > + vin8: video@e6ef8000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef8000 0 0x1000>;
> > + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 806>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 806>;
> > + status = "disabled";
> > + };
> > +
> > + vin9: video@e6ef9000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ef9000 0 0x1000>;
> > + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 807>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 807>;
> > + status = "disabled";
> > + };
> > +
> > + vin10: video@e6efa000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6efa000 0 0x1000>;
> > + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 808>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 808>;
> > + status = "disabled";
> > + };
> > +
> > + vin11: video@e6efb000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6efb000 0 0x1000>;
> > + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 809>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 809>;
> > + status = "disabled";
> > + };
> > +
> > + vin12: video@e6efc000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6efc000 0 0x1000>;
> > + interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 810>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 810>;
> > + status = "disabled";
> > + };
> > +
> > + vin13: video@e6efd000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6efd000 0 0x1000>;
> > + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 811>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 811>;
> > + status = "disabled";
> > + };
> > +
> > + vin14: video@e6efe000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6efe000 0 0x1000>;
> > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 812>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 812>;
> > + status = "disabled";
> > + };
> > +
> > + vin15: video@e6eff000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6eff000 0 0x1000>;
> > + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 813>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 813>;
> > + status = "disabled";
> > + };
> > +
> > + vin16: video@e6ed0000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed0000 0 0x1000>;
> > + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 814>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 814>;
> > + status = "disabled";
> > + };
> > +
> > + vin17: video@e6ed1000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed1000 0 0x1000>;
> > + interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 815>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 815>;
> > + status = "disabled";
> > + };
> > +
> > + vin18: video@e6ed2000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed2000 0 0x1000>;
> > + interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 816>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 816>;
> > + status = "disabled";
> > + };
> > +
> > + vin19: video@e6ed3000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed3000 0 0x1000>;
> > + interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 817>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 817>;
> > + status = "disabled";
> > + };
> > +
> > + vin20: video@e6ed4000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed4000 0 0x1000>;
> > + interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 818>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 818>;
> > + status = "disabled";
> > + };
> > +
> > + vin21: video@e6ed5000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed5000 0 0x1000>;
> > + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 819>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 819>;
> > + status = "disabled";
> > + };
> > +
> > + vin22: video@e6ed6000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed6000 0 0x1000>;
> > + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 820>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 820>;
> > + status = "disabled";
> > + };
> > +
> > + vin23: video@e6ed7000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed7000 0 0x1000>;
> > + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 821>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 821>;
> > + status = "disabled";
> > + };
> > +
> > + vin24: video@e6ed8000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed8000 0 0x1000>;
> > + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 822>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 822>;
> > + status = "disabled";
> > + };
> > +
> > + vin25: video@e6ed9000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ed9000 0 0x1000>;
> > + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 823>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 823>;
> > + status = "disabled";
> > + };
> > +
> > + vin26: video@e6eda000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6eda000 0 0x1000>;
> > + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 824>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 824>;
> > + status = "disabled";
> > + };
> > +
> > + vin27: video@e6edb000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6edb000 0 0x1000>;
> > + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 825>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 825>;
> > + status = "disabled";
> > + };
> > +
> > + vin28: video@e6edc000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6edc000 0 0x1000>;
> > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 826>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 826>;
> > + status = "disabled";
> > + };
> > +
> > + vin29: video@e6edd000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6edd000 0 0x1000>;
> > + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 827>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 827>;
> > + status = "disabled";
> > + };
> > +
> > + vin30: video@e6ede000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6ede000 0 0x1000>;
> > + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 828>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 828>;
> > + status = "disabled";
> > + };
> > +
> > + vin31: video@e6edf000 {
> > + compatible = "renesas,vin-r8a779a0";
> > + reg = <0 0xe6edf000 0 0x1000>;
> > + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 829>;
> > + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> > + resets = <&cpg 829>;
> > + status = "disabled";
> > + };
> > +
> > csi40: csi2@feaa0000 {
> > compatible = "renesas,r8a779a0-csi2";
> > reg = <0 0xfeaa0000 0 0x10000>;
> > --
> > 2.28.0
> >
>
> --
> Regards,
> Niklas Söderlund
On 10/14/20 12:44 PM, Jacopo Mondi wrote:
> Add clock definitions of the VIN instances for R-Car V3U.
>
> Signed-off-by: Jacopo Mondi <[email protected]>
>
> ---
> Clocks at indexes 730 and 731 are named 'vin0' and 'vin1'.
> I assumed it's a typographic error and renamed them 'vin00' and 'vin01'
> ---
> drivers/clk/renesas/r8a779a0-cpg-mssr.c | 32 +++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> index bd54a28c50ee..2a00eb82013f 100644
> --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> @@ -149,6 +149,38 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
> DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
> DEF_MOD("scif4", 705, R8A779A0_CLK_S1D8),
> + DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin03", 801, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin04", 802, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin05", 803, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin06", 804, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin07", 805, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin10", 806, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin11", 807, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin12", 808, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin13", 809, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin14", 810, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin15", 811, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin16", 812, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin17", 813, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin20", 814, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin21", 815, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin22", 816, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin23", 817, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin24", 818, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin25", 819, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin26", 820, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin27", 821, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin30", 822, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin31", 823, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin32", 824, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin33", 825, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin34", 826, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
> + DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
The subject says VIN[0-31]?
[...]
MBR, Sergei
Hi Jacopo,
Thanks for your patch.
On 2020-10-14 11:44:42 +0200, Jacopo Mondi wrote:
> Add compatible string definition for R-Car V3U.
>
> Signed-off-by: Jacopo Mondi <[email protected]>
> ---
> Documentation/devicetree/bindings/media/renesas,vin.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/media/renesas,vin.yaml b/Documentation/devicetree/bindings/media/renesas,vin.yaml
> index ad2fe660364b..7b629a6ea035 100644
> --- a/Documentation/devicetree/bindings/media/renesas,vin.yaml
> +++ b/Documentation/devicetree/bindings/media/renesas,vin.yaml
> @@ -51,6 +51,7 @@ properties:
> - renesas,vin-r8a77980 # R-Car V3H
> - renesas,vin-r8a77990 # R-Car E3
> - renesas,vin-r8a77995 # R-Car D3
> + - renesas,vin-r8a779a0 # R-Car V3U
Documenting the compat string here might give the wrong impression the
IP is supported. Which it's not as the V3U is quiet different then the
it's siblings. Whit a new pipeline and small but important changes in in
the register set. I'm primarily thinking about that the IFMD register is
gone and dealing with that will be quiet significant work in the driver.
I'm not yet 100% sure the best idea is to support V3U with this driver,
maybe it's finally time to make it more modular, with more distinct
support for Gen2, Gen3 and a new module for V3U?
>
> reg:
> maxItems: 1
> --
> 2.28.0
>
--
Regards,
Niklas S?derlund
Hi Sergei,
On Wed, Oct 14, 2020 at 09:55:32PM +0300, Sergei Shtylyov wrote:
> On 10/14/20 12:44 PM, Jacopo Mondi wrote:
>
> > Add clock definitions of the VIN instances for R-Car V3U.
> >
> > Signed-off-by: Jacopo Mondi <[email protected]>
> >
> > ---
> > Clocks at indexes 730 and 731 are named 'vin0' and 'vin1'.
> > I assumed it's a typographic error and renamed them 'vin00' and 'vin01'
> > ---
> > drivers/clk/renesas/r8a779a0-cpg-mssr.c | 32 +++++++++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > index bd54a28c50ee..2a00eb82013f 100644
> > --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > @@ -149,6 +149,38 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> > DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
> > DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
> > DEF_MOD("scif4", 705, R8A779A0_CLK_S1D8),
> > + DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin03", 801, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin04", 802, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin05", 803, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin06", 804, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin07", 805, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin10", 806, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin11", 807, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin12", 808, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin13", 809, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin14", 810, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin15", 811, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin16", 812, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin17", 813, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin20", 814, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin21", 815, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin22", 816, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin23", 817, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin24", 818, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin25", 819, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin26", 820, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin27", 821, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin30", 822, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin31", 823, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin32", 824, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin33", 825, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin34", 826, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
> > + DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
There are 32 VIN instances (hence the [0-31] in the subject), grouped
in 4 units of 8 channels each.
I can drop the [0-31] in the subject if it's confusing.
>
> The subject says VIN[0-31]?
>
> [...]
>
> MBR, Sergei
Hello!
On 15.10.2020 12:32, Jacopo Mondi wrote:
[...]
>>> Add clock definitions of the VIN instances for R-Car V3U.
>>>
>>> Signed-off-by: Jacopo Mondi <[email protected]>
>>>
>>> ---
>>> Clocks at indexes 730 and 731 are named 'vin0' and 'vin1'.
>>> I assumed it's a typographic error and renamed them 'vin00' and 'vin01'
>>> ---
>>> drivers/clk/renesas/r8a779a0-cpg-mssr.c | 32 +++++++++++++++++++++++++
>>> 1 file changed, 32 insertions(+)
>>>
>>> diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
>>> index bd54a28c50ee..2a00eb82013f 100644
>>> --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
>>> +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
>>> @@ -149,6 +149,38 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
>>> DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
>>> DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
>>> DEF_MOD("scif4", 705, R8A779A0_CLK_S1D8),
>>> + DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin03", 801, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin04", 802, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin05", 803, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin06", 804, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin07", 805, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin10", 806, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin11", 807, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin12", 808, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin13", 809, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin14", 810, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin15", 811, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin16", 812, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin17", 813, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin20", 814, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin21", 815, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin22", 816, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin23", 817, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin24", 818, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin25", 819, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin26", 820, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin27", 821, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin30", 822, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin31", 823, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin32", 824, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin33", 825, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin34", 826, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
>>> + DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
>
> There are 32 VIN instances (hence the [0-31] in the subject), grouped
> in 4 units of 8 channels each.
>
> I can drop the [0-31] in the subject if it's confusing.
Please do. :-)
>> The subject says VIN[0-31]?
>>
>> [...]
MBR, Sergei
Hi Jacopo,
On Thu, Oct 15, 2020 at 9:32 AM Jacopo Mondi <[email protected]> wrote:
> On Wed, Oct 14, 2020 at 09:55:32PM +0300, Sergei Shtylyov wrote:
> > On 10/14/20 12:44 PM, Jacopo Mondi wrote:
> > > Add clock definitions of the VIN instances for R-Car V3U.
> > >
> > > Signed-off-by: Jacopo Mondi <[email protected]>
> > >
> > > ---
> > > Clocks at indexes 730 and 731 are named 'vin0' and 'vin1'.
> > > I assumed it's a typographic error and renamed them 'vin00' and 'vin01'
> > > ---
> > > drivers/clk/renesas/r8a779a0-cpg-mssr.c | 32 +++++++++++++++++++++++++
> > > 1 file changed, 32 insertions(+)
> > >
> > > diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > > index bd54a28c50ee..2a00eb82013f 100644
> > > --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > > +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > > @@ -149,6 +149,38 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> > > DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
> > > DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
> > > DEF_MOD("scif4", 705, R8A779A0_CLK_S1D8),
> > > + DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin03", 801, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin04", 802, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin05", 803, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin06", 804, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin07", 805, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin10", 806, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin11", 807, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin12", 808, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin13", 809, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin14", 810, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin15", 811, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin16", 812, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin17", 813, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin20", 814, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin21", 815, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin22", 816, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin23", 817, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin24", 818, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin25", 819, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin26", 820, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin27", 821, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin30", 822, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin31", 823, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin32", 824, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin33", 825, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin34", 826, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
> > > + DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
>
> > The subject says VIN[0-31]?
>
> There are 32 VIN instances (hence the [0-31] in the subject), grouped
> in 4 units of 8 channels each.
>
> I can drop the [0-31] in the subject if it's confusing.
The VIN naming in the R-Car V3U documentation is very confusing.
E.g. all of the following are used, and refer to the same channel:
1. VIN37,
2. VIN31,
3. vin3 ch7.
Looks good to me, but I cannot verify the parent clocks
Reviewed-by: Geert Uytterhoeven <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
On Thu, Oct 15, 2020 at 06:30:03PM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Thu, Oct 15, 2020 at 9:32 AM Jacopo Mondi <[email protected]> wrote:
> > On Wed, Oct 14, 2020 at 09:55:32PM +0300, Sergei Shtylyov wrote:
> > > On 10/14/20 12:44 PM, Jacopo Mondi wrote:
> > > > Add clock definitions of the VIN instances for R-Car V3U.
> > > >
> > > > Signed-off-by: Jacopo Mondi <[email protected]>
> > > >
> > > > ---
> > > > Clocks at indexes 730 and 731 are named 'vin0' and 'vin1'.
> > > > I assumed it's a typographic error and renamed them 'vin00' and 'vin01'
Add this to the list of things which not exactly clear in the current
documentation
> > > > ---
> > > > drivers/clk/renesas/r8a779a0-cpg-mssr.c | 32 +++++++++++++++++++++++++
> > > > 1 file changed, 32 insertions(+)
> > > >
> > > > diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > > > index bd54a28c50ee..2a00eb82013f 100644
> > > > --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > > > +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
> > > > @@ -149,6 +149,38 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
> > > > DEF_MOD("scif1", 703, R8A779A0_CLK_S1D8),
> > > > DEF_MOD("scif3", 704, R8A779A0_CLK_S1D8),
> > > > DEF_MOD("scif4", 705, R8A779A0_CLK_S1D8),
> > > > + DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin03", 801, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin04", 802, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin05", 803, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin06", 804, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin07", 805, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin10", 806, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin11", 807, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin12", 808, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin13", 809, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin14", 810, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin15", 811, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin16", 812, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin17", 813, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin20", 814, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin21", 815, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin22", 816, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin23", 817, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin24", 818, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin25", 819, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin26", 820, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin27", 821, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin30", 822, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin31", 823, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin32", 824, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin33", 825, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin34", 826, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin35", 827, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin36", 828, R8A779A0_CLK_S1D1),
> > > > + DEF_MOD("vin37", 829, R8A779A0_CLK_S1D1),
> >
> > > The subject says VIN[0-31]?
> >
> > There are 32 VIN instances (hence the [0-31] in the subject), grouped
> > in 4 units of 8 channels each.
> >
> > I can drop the [0-31] in the subject if it's confusing.
>
> The VIN naming in the R-Car V3U documentation is very confusing.
> E.g. all of the following are used, and refer to the same channel:
> 1. VIN37,
> 2. VIN31,
> 3. vin3 ch7.
>
> Looks good to me, but I cannot verify the parent clocks
I got them from the downstream driver, as they're not documented.
> Reviewed-by: Geert Uytterhoeven <[email protected]>
Thanks
j
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds