2020-11-08 18:56:21

by Michael Walle

Subject: [PATCH v3 1/9] arm64: dts: ls1028a: fix ENETC PTP clock input

On the LS1028A the ENETC reference clock is connected to 4th HWA output,
see Figure 7 "Clock subsystem block diagram".

The PHC may run with a wrong frequency. ptp_qoriq_auto_config() will read
the clock speed of the clock given in the device tree. It is likely that,
on the reference board this wasn't noticed because both clocks have the
same frequency. But this must not be always the case. Fix it.

Fixes: 49401003e260 ("arm64: dts: fsl: ls1028a: add ENETC 1588 timer node")
Signed-off-by: Michael Walle <[email protected]>
---
Changes since v2:
- new patch

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 2c831d814572..e22f29aa4658 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -961,7 +961,7 @@
ethernet@0,4 {
compatible = "fsl,enetc-ptp";
reg = <0x000400 0 0 0 0>;
- clocks = <&clockgen 4 0>;
+ clocks = <&clockgen 2 3>;
little-endian;
fsl,extts-fifo;
};
--
2.20.1

2020-11-30 09:25:03

by Shawn Guo

Subject: Re: [PATCH v3 1/9] arm64: dts: ls1028a: fix ENETC PTP clock input

On Sun, Nov 08, 2020 at 07:51:05PM +0100, Michael Walle wrote:
> On the LS1028A the ENETC reference clock is connected to 4th HWA output,
> see Figure 7 "Clock subsystem block diagram".
>
> The PHC may run with a wrong frequency. ptp_qoriq_auto_config() will read
> the clock speed of the clock given in the device tree. It is likely that,
> on the reference board this wasn't noticed because both clocks have the
> same frequency. But this must not be always the case. Fix it.
>
> Fixes: 49401003e260 ("arm64: dts: fsl: ls1028a: add ENETC 1588 timer node")
> Signed-off-by: Michael Walle <[email protected]>

Applied, thanks.