The AXG Analog MIPI-DSI PHY also provides functions to the PCIe PHY,
thus we need to have inclusive support for both interfaces at runtime.
This fixes the regmap get from parent node, removes cell param
to select a mode and implement runtime configuration & power on/off
for both functions since they are not exclusive.
Changes since v2 at [2]:
- Add DT review tags
- Rebase on 5.10-rc1
Changes since v1 at [1]:
- added description to binding as requested parent
- updated commit log of patch 1
- also update example of patch 1
[1] https://lkml.kernel.org/r/[email protected]
[2] https://lkml.kernel.org/r/[email protected]
Neil Armstrong (3):
dt-bindings: phy: amlogic,meson-axg-mipi-pcie-analog: remove reg
attribute
dt-bindings: phy: amlogic,meson-axg-mipi-pcie-analog: remove phy cell
parameter
phy: amlogic: phy-meson-axg-mipi-pcie-analog: add support for MIPI DSI
analog
.../amlogic,meson-axg-mipi-pcie-analog.yaml | 21 +-
drivers/phy/amlogic/Kconfig | 1 +
.../amlogic/phy-meson-axg-mipi-pcie-analog.c | 204 ++++++++++++------
3 files changed, 149 insertions(+), 77 deletions(-)
--
2.25.1
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and
MIPI DSI at the same time, and is not exclusive.
Thus remove the invalid phy cell parameter.
Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
.../bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
index 702763a84dac..4d01f3124e1c 100644
--- a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
+++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
@@ -24,7 +24,7 @@ properties:
const: amlogic,axg-mipi-pcie-analog-phy
"#phy-cells":
- const: 1
+ const: 0
required:
- compatible
@@ -36,5 +36,5 @@ examples:
- |
mpphy: phy {
compatible = "amlogic,axg-mipi-pcie-analog-phy";
- #phy-cells = <1>;
+ #phy-cells = <0>;
};
--
2.25.1
The PHY registers happens to be at the beginning of a large zone containing
interleaved system registers (mainly clocks, power management, PHY control..),
found in all Amlogic SoC so far.
The goal is to model it the same way as the other "features" of this zone,
like Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
and Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
and have a coherent bindings scheme over the Amlogic SoCs.
This update the description, removed the reg attribute then updates the example
accordingly.
Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
.../phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
index 18c1ec5e19ad..702763a84dac 100644
--- a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
+++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
@@ -9,27 +9,32 @@ title: Amlogic AXG shared MIPI/PCIE analog PHY
maintainers:
- Remi Pommarel <[email protected]>
+description: |+
+ The Everything-Else Power Domains node should be the child of a syscon
+ node with the required property:
+
+ - compatible: Should be the following:
+ "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
+
+ Refer to the the bindings described in
+ Documentation/devicetree/bindings/mfd/syscon.yaml
+
properties:
compatible:
const: amlogic,axg-mipi-pcie-analog-phy
- reg:
- maxItems: 1
-
"#phy-cells":
const: 1
required:
- compatible
- - reg
- "#phy-cells"
additionalProperties: false
examples:
- |
- mpphy: phy@0 {
+ mpphy: phy {
compatible = "amlogic,axg-mipi-pcie-analog-phy";
- reg = <0x0 0xc>;
#phy-cells = <1>;
};
--
2.25.1
On 16-11-20, 11:16, Neil Armstrong wrote:
> The AXG Analog MIPI-DSI PHY also provides functions to the PCIe PHY,
> thus we need to have inclusive support for both interfaces at runtime.
>
> This fixes the regmap get from parent node, removes cell param
> to select a mode and implement runtime configuration & power on/off
> for both functions since they are not exclusive.
Applied, thanks
--
~Vinod