Add power domains dt-bindings for MT8167.
Signed-off-by: Fabien Parent <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
This patch was made on top of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/log/?h=v5.10-next/soc
v3:
* Remove MT8167_POWER_DOMAIN_DISP since it was an alias for MT8167_POWER_DOMAIN_MM
v2:
* Implement on top of new SCPSYS PM domains driver
.../power/mediatek,power-controller.yaml | 2 ++
include/dt-bindings/power/mt8167-power.h | 17 +++++++++++++++++
2 files changed, 19 insertions(+)
create mode 100644 include/dt-bindings/power/mt8167-power.h
diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index fd12bafe3548..ad6db377f943 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -23,6 +23,7 @@ properties:
compatible:
enum:
+ - mediatek,mt8167-power-controller
- mediatek,mt8173-power-controller
- mediatek,mt8183-power-controller
- mediatek,mt8192-power-controller
@@ -59,6 +60,7 @@ patternProperties:
reg:
description: |
Power domain index. Valid values are defined in:
+ "include/dt-bindings/power/mt8167-power.h" - for MT8167 type power domain.
"include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.
"include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
"include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
diff --git a/include/dt-bindings/power/mt8167-power.h b/include/dt-bindings/power/mt8167-power.h
new file mode 100644
index 000000000000..c8ec9983a4bc
--- /dev/null
+++ b/include/dt-bindings/power/mt8167-power.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8167_POWER_H
+#define _DT_BINDINGS_POWER_MT8167_POWER_H
+
+#define MT8167_POWER_DOMAIN_MM 0
+#define MT8167_POWER_DOMAIN_VDEC 1
+#define MT8167_POWER_DOMAIN_ISP 2
+#define MT8167_POWER_DOMAIN_CONN 3
+#define MT8167_POWER_DOMAIN_MFG_ASYNC 4
+#define MT8167_POWER_DOMAIN_MFG_2D 5
+#define MT8167_POWER_DOMAIN_MFG 6
+
+#endif /* _DT_BINDINGS_POWER_MT8167_POWER_H */
--
2.29.2
Add the needed board data to support mt8167 SoC.
Signed-off-by: Fabien Parent <[email protected]>
Reviewed-by: Enric Balletbo i Serra <[email protected]>
---
This patch was made on top of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/log/?h=v5.10-next/soc
v3:
* s/MT8167_POWER_DOMAIN_DISP/MT8167_POWER_DOMAIN_MM
* s/.domains/.domains_data
v2:
* Implement on top of new SCPSYS PM domains driver
drivers/soc/mediatek/mt8167-pm-domains.h | 86 ++++++++++++++++++++++++
drivers/soc/mediatek/mtk-pm-domains.c | 5 ++
drivers/soc/mediatek/mtk-pm-domains.h | 1 +
include/linux/soc/mediatek/infracfg.h | 8 +++
4 files changed, 100 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8167-pm-domains.h
diff --git a/drivers/soc/mediatek/mt8167-pm-domains.h b/drivers/soc/mediatek/mt8167-pm-domains.h
new file mode 100644
index 000000000000..ad0b8dfa0527
--- /dev/null
+++ b/drivers/soc/mediatek/mt8167-pm-domains.h
@@ -0,0 +1,86 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_MT8167_PM_DOMAINS_H
+#define __SOC_MEDIATEK_MT8167_PM_DOMAINS_H
+
+#include "mtk-pm-domains.h"
+#include <dt-bindings/power/mt8167-power.h>
+
+#define MT8167_PWR_STATUS_MFG_2D BIT(24)
+#define MT8167_PWR_STATUS_MFG_ASYNC BIT(25)
+
+/*
+ * MT8167 power domain support
+ */
+
+static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
+ [MT8167_POWER_DOMAIN_MM] = {
+ .sta_mask = PWR_STATUS_DISP,
+ .ctl_offs = SPM_DIS_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .bp_infracfg = {
+ BUS_PROT_UPDATE_TOPAXI(MT8167_TOP_AXI_PROT_EN_MM_EMI |
+ MT8167_TOP_AXI_PROT_EN_MCU_MM),
+ },
+ .caps = MTK_SCPD_ACTIVE_WAKEUP,
+ },
+ [MT8167_POWER_DOMAIN_VDEC] = {
+ .sta_mask = PWR_STATUS_VDEC,
+ .ctl_offs = SPM_VDE_PWR_CON,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .caps = MTK_SCPD_ACTIVE_WAKEUP,
+ },
+ [MT8167_POWER_DOMAIN_ISP] = {
+ .sta_mask = PWR_STATUS_ISP,
+ .ctl_offs = SPM_ISP_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(13, 12),
+ .caps = MTK_SCPD_ACTIVE_WAKEUP,
+ },
+ [MT8167_POWER_DOMAIN_MFG_ASYNC] = {
+ .sta_mask = MT8167_PWR_STATUS_MFG_ASYNC,
+ .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
+ .sram_pdn_bits = 0,
+ .sram_pdn_ack_bits = 0,
+ .bp_infracfg = {
+ BUS_PROT_UPDATE_TOPAXI(MT8167_TOP_AXI_PROT_EN_MCU_MFG |
+ MT8167_TOP_AXI_PROT_EN_MFG_EMI),
+ },
+ },
+ [MT8167_POWER_DOMAIN_MFG_2D] = {
+ .sta_mask = MT8167_PWR_STATUS_MFG_2D,
+ .ctl_offs = SPM_MFG_2D_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ },
+ [MT8167_POWER_DOMAIN_MFG] = {
+ .sta_mask = PWR_STATUS_MFG,
+ .ctl_offs = SPM_MFG_PWR_CON,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ },
+ [MT8167_POWER_DOMAIN_CONN] = {
+ .sta_mask = PWR_STATUS_CONN,
+ .ctl_offs = SPM_CONN_PWR_CON,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = 0,
+ .caps = MTK_SCPD_ACTIVE_WAKEUP,
+ .bp_infracfg = {
+ BUS_PROT_UPDATE_TOPAXI(MT8167_TOP_AXI_PROT_EN_CONN_EMI |
+ MT8167_TOP_AXI_PROT_EN_CONN_MCU |
+ MT8167_TOP_AXI_PROT_EN_MCU_CONN),
+ },
+ },
+};
+
+static const struct scpsys_soc_data mt8167_scpsys_data = {
+ .domains_data = scpsys_domain_data_mt8167,
+ .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8167),
+ .pwr_sta_offs = SPM_PWR_STATUS,
+ .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND,
+};
+
+#endif /* __SOC_MEDIATEK_MT8167_PM_DOMAINS_H */
+
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index fb70cb3b07b3..2d0d50ff35f0 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -15,6 +15,7 @@
#include <linux/regmap.h>
#include <linux/soc/mediatek/infracfg.h>
+#include "mt8167-pm-domains.h"
#include "mt8173-pm-domains.h"
#include "mt8183-pm-domains.h"
#include "mt8192-pm-domains.h"
@@ -514,6 +515,10 @@ static void scpsys_domain_cleanup(struct scpsys *scpsys)
}
static const struct of_device_id scpsys_of_match[] = {
+ {
+ .compatible = "mediatek,mt8167-power-controller",
+ .data = &mt8167_scpsys_data,
+ },
{
.compatible = "mediatek,mt8173-power-controller",
.data = &mt8173_scpsys_data,
diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
index a2f4d8f97e05..88f5835e1648 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.h
+++ b/drivers/soc/mediatek/mtk-pm-domains.h
@@ -14,6 +14,7 @@
#define SPM_VEN_PWR_CON 0x0230
#define SPM_ISP_PWR_CON 0x0238
#define SPM_DIS_PWR_CON 0x023c
+#define SPM_CONN_PWR_CON 0x0280
#define SPM_VEN2_PWR_CON 0x0298
#define SPM_AUDIO_PWR_CON 0x029c
#define SPM_MFG_2D_PWR_CON 0x02c0
diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h
index e7842debc05d..4615a228da51 100644
--- a/include/linux/soc/mediatek/infracfg.h
+++ b/include/linux/soc/mediatek/infracfg.h
@@ -123,6 +123,14 @@
#define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22)
#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23)
+#define MT8167_TOP_AXI_PROT_EN_MM_EMI BIT(1)
+#define MT8167_TOP_AXI_PROT_EN_MCU_MFG BIT(2)
+#define MT8167_TOP_AXI_PROT_EN_CONN_EMI BIT(4)
+#define MT8167_TOP_AXI_PROT_EN_MFG_EMI BIT(5)
+#define MT8167_TOP_AXI_PROT_EN_CONN_MCU BIT(8)
+#define MT8167_TOP_AXI_PROT_EN_MCU_CONN BIT(9)
+#define MT8167_TOP_AXI_PROT_EN_MCU_MM BIT(11)
+
#define MT2701_TOP_AXI_PROT_EN_MM_M0 BIT(1)
#define MT2701_TOP_AXI_PROT_EN_CONN_M BIT(2)
#define MT2701_TOP_AXI_PROT_EN_CONN_S BIT(8)
--
2.29.2
On 09/12/2020 14:32, Fabien Parent wrote:
> Add power domains dt-bindings for MT8167.
>
> Signed-off-by: Fabien Parent <[email protected]>
> Acked-by: Rob Herring <[email protected]>
Both patches applied to v5.11-next/soc
Thanks!
> ---
> This patch was made on top of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/log/?h=v5.10-next/soc
>
> v3:
> * Remove MT8167_POWER_DOMAIN_DISP since it was an alias for MT8167_POWER_DOMAIN_MM
> v2:
> * Implement on top of new SCPSYS PM domains driver
>
> .../power/mediatek,power-controller.yaml | 2 ++
> include/dt-bindings/power/mt8167-power.h | 17 +++++++++++++++++
> 2 files changed, 19 insertions(+)
> create mode 100644 include/dt-bindings/power/mt8167-power.h
>
> diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> index fd12bafe3548..ad6db377f943 100644
> --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> @@ -23,6 +23,7 @@ properties:
>
> compatible:
> enum:
> + - mediatek,mt8167-power-controller
> - mediatek,mt8173-power-controller
> - mediatek,mt8183-power-controller
> - mediatek,mt8192-power-controller
> @@ -59,6 +60,7 @@ patternProperties:
> reg:
> description: |
> Power domain index. Valid values are defined in:
> + "include/dt-bindings/power/mt8167-power.h" - for MT8167 type power domain.
> "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.
> "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
> "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
> diff --git a/include/dt-bindings/power/mt8167-power.h b/include/dt-bindings/power/mt8167-power.h
> new file mode 100644
> index 000000000000..c8ec9983a4bc
> --- /dev/null
> +++ b/include/dt-bindings/power/mt8167-power.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: GPL-2.0
> + *
> + * Copyright (c) 2020 MediaTek Inc.
> + */
> +
> +#ifndef _DT_BINDINGS_POWER_MT8167_POWER_H
> +#define _DT_BINDINGS_POWER_MT8167_POWER_H
> +
> +#define MT8167_POWER_DOMAIN_MM 0
> +#define MT8167_POWER_DOMAIN_VDEC 1
> +#define MT8167_POWER_DOMAIN_ISP 2
> +#define MT8167_POWER_DOMAIN_CONN 3
> +#define MT8167_POWER_DOMAIN_MFG_ASYNC 4
> +#define MT8167_POWER_DOMAIN_MFG_2D 5
> +#define MT8167_POWER_DOMAIN_MFG 6
> +
> +#endif /* _DT_BINDINGS_POWER_MT8167_POWER_H */
>