Since outbound iATU permits size to be greater than
4GB for which the support is also available, allow
EP function to send u64 size instead of truncating
to u32.
Signed-off-by: Shradha Todi <[email protected]>
---
drivers/pci/controller/dwc/pcie-designware.c | 2 +-
drivers/pci/controller/dwc/pcie-designware.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 7eba3b2..6298212 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -325,7 +325,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index,
int type, u64 cpu_addr, u64 pci_addr,
- u32 size)
+ u64 size)
{
__dw_pcie_prog_outbound_atu(pci, func_no, index, type,
cpu_addr, pci_addr, size);
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 28b72fb..bb33f28 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -307,7 +307,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
u64 size);
void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index,
int type, u64 cpu_addr, u64 pci_addr,
- u32 size);
+ u64 size);
int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,
int bar, u64 cpu_addr,
enum dw_pcie_as_type as_type);
--
2.7.4
On Fri, Dec 18, 2020 at 09:04:08PM +0530, Shradha Todi wrote:
> Since outbound iATU permits size to be greater than
> 4GB for which the support is also available, allow
> EP function to send u64 size instead of truncating
> to u32.
Please wrap your commit messages so they use more of an 80-column
window. I use "set textwidth=75" for vim to account for git log
indenting by 4 characters.
I know 80 isn't a magic width, but it's the convention in drivers/pci.
This also affects other patches from you, e.g., "PCI: dwc: Add upper
limit address for outbound iATU".
> Signed-off-by: Shradha Todi <[email protected]>
> ---
> drivers/pci/controller/dwc/pcie-designware.c | 2 +-
> drivers/pci/controller/dwc/pcie-designware.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 7eba3b2..6298212 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -325,7 +325,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
>
> void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index,
> int type, u64 cpu_addr, u64 pci_addr,
> - u32 size)
> + u64 size)
> {
> __dw_pcie_prog_outbound_atu(pci, func_no, index, type,
> cpu_addr, pci_addr, size);
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 28b72fb..bb33f28 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -307,7 +307,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
> u64 size);
> void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index,
> int type, u64 cpu_addr, u64 pci_addr,
> - u32 size);
> + u64 size);
> int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,
> int bar, u64 cpu_addr,
> enum dw_pcie_as_type as_type);
> --
> 2.7.4
>
> From: Bjorn Helgaas <[email protected]>
> Subject: Re: [PATCH] PCI: dwc: Change size to u64 for EP outbound iATU
>
> On Fri, Dec 18, 2020 at 09:04:08PM +0530, Shradha Todi wrote:
> > Since outbound iATU permits size to be greater than 4GB for which the
> > support is also available, allow EP function to send u64 size instead
> > of truncating to u32.
>
> Please wrap your commit messages so they use more of an 80-column window.
> I use "set textwidth=75" for vim to account for git log indenting by 4
characters.
>
> I know 80 isn't a magic width, but it's the convention in drivers/pci.
>
> This also affects other patches from you, e.g., "PCI: dwc: Add upper limit
> address for outbound iATU".
>
Thanks for the review and suggestion. I will take care of this for all my
patches
in next version.
> > Signed-off-by: Shradha Todi <[email protected]>
> > ---
> > drivers/pci/controller/dwc/pcie-designware.c | 2 +-
> > drivers/pci/controller/dwc/pcie-designware.h | 2 +-
> > 2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.c
> > b/drivers/pci/controller/dwc/pcie-designware.c
> > index 7eba3b2..6298212 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware.c
> > @@ -325,7 +325,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie
> > *pci, int index, int type,
> >
> > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int
> index,
> > int type, u64 cpu_addr, u64 pci_addr,
> > - u32 size)
> > + u64 size)
> > {
> > __dw_pcie_prog_outbound_atu(pci, func_no, index, type,
> > cpu_addr, pci_addr, size);
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.h
> > b/drivers/pci/controller/dwc/pcie-designware.h
> > index 28b72fb..bb33f28 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > @@ -307,7 +307,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
> int index,
> > u64 size);
> > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int
> index,
> > int type, u64 cpu_addr, u64 pci_addr,
> > - u32 size);
> > + u64 size);
> > int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int
index,
> > int bar, u64 cpu_addr,
> > enum dw_pcie_as_type as_type);
> > --
> > 2.7.4
> >