2020-12-29 06:34:25

by ChiaWei Wang

[permalink] [raw]
Subject: [PATCH v4 0/5] Remove LPC register partitioning

The LPC controller has no concept of the BMC and the Host partitions.
The incorrect partitioning can impose unnecessary range restrictions
on register access through the syscon regmap interface.

For instance, HICRB contains the I/O port address configuration
of KCS channel 1/2. However, the KCS#1/#2 drivers cannot access
HICRB as it is located at the other LPC partition.

In addition, to be backward compatible, the newly added HW control
bits could be located at any reserved bits over the LPC addressing
space.

Thereby, this patch series aims to remove the LPC partitioning for
better driver development and maintenance. This requires the change
to both the device tree and the driver implementation. To ensure
both sides are synchronously updated, a v2 binding check is added.

Chagnes since v3:
- Revise binding check as suggested by Haiyue Wang

Changes since v2:
- Add v2 binding check to ensure the synchronization between the
device tree change and the driver register offset fix.

Changes since v1:
- Add the fix to the aspeed-lpc binding documentation.

Chia-Wei, Wang (5):
dt-bindings: aspeed-lpc: Remove LPC partitioning
ARM: dts: Remove LPC BMC and Host partitions
ipmi: kcs: aspeed: Adapt to new LPC DTS layout
pinctrl: aspeed-g5: Adapt to new LPC device tree layout
soc: aspeed: Adapt to new LPC device tree layout

.../devicetree/bindings/mfd/aspeed-lpc.txt | 99 +++----------
arch/arm/boot/dts/aspeed-g4.dtsi | 74 ++++------
arch/arm/boot/dts/aspeed-g5.dtsi | 135 ++++++++----------
arch/arm/boot/dts/aspeed-g6.dtsi | 135 ++++++++----------
drivers/char/ipmi/kcs_bmc_aspeed.c | 27 ++--
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 17 ++-
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 20 ++-
drivers/soc/aspeed/aspeed-lpc-snoop.c | 23 +--
8 files changed, 225 insertions(+), 305 deletions(-)

--
2.17.1


2020-12-29 06:34:26

by ChiaWei Wang

[permalink] [raw]
Subject: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning

The LPC controller has no concept of the BMC and the Host partitions.
This patch fixes the documentation by removing the description on LPC
partitions. The register offsets illustrated in the DTS node examples
are also fixed to adapt to the LPC DTS change.

Signed-off-by: Chia-Wei, Wang <[email protected]>
---
.../devicetree/bindings/mfd/aspeed-lpc.txt | 99 ++++---------------
1 file changed, 21 insertions(+), 78 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index d0a38ba8b9ce..90eb0ecc95d1 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a slave on the bus
conditions it can also take the role of bus master.

The LPC controller is represented as a multi-function device to account for the
-mix of functionality it provides. The principle split is between the register
-layout at the start of the I/O space which is, to quote the Aspeed datasheet,
-"basically compatible with the [LPC registers from the] popular BMC controller
-H8S/2168[1]", and everything else, where everything else is an eclectic
-collection of functions with a esoteric register layout. "Everything else",
-here labeled the "host" portion of the controller, includes, but is not limited
-to:
+mix of functionality, which includes, but is not limited to:

* An IPMI Block Transfer[2] Controller

@@ -44,80 +38,29 @@ Required properties
===================

- compatible: One of:
- "aspeed,ast2400-lpc", "simple-mfd"
- "aspeed,ast2500-lpc", "simple-mfd"
- "aspeed,ast2600-lpc", "simple-mfd"
+ "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon"
+ "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"
+ "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"

- reg: contains the physical address and length values of the Aspeed
LPC memory region.

- #address-cells: <1>
- #size-cells: <1>
-- ranges: Maps 0 to the physical address and length of the LPC memory
- region
-
-Required LPC Child nodes
-========================
-
-BMC Node
---------
-
-- compatible: One of:
- "aspeed,ast2400-lpc-bmc"
- "aspeed,ast2500-lpc-bmc"
- "aspeed,ast2600-lpc-bmc"
-
-- reg: contains the physical address and length values of the
- H8S/2168-compatible LPC controller memory region
-
-Host Node
----------
-
-- compatible: One of:
- "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
- "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
- "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
-
-- reg: contains the address and length values of the host-related
- register space for the Aspeed LPC controller
-
-- #address-cells: <1>
-- #size-cells: <1>
-- ranges: Maps 0 to the address and length of the host-related LPC memory
+- ranges: Maps 0 to the physical address and length of the LPC memory
region

Example:

lpc: lpc@1e789000 {
- compatible = "aspeed,ast2500-lpc", "simple-mfd";
+ compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
reg = <0x1e789000 0x1000>;

#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
-
- lpc_bmc: lpc-bmc@0 {
- compatible = "aspeed,ast2500-lpc-bmc";
- reg = <0x0 0x80>;
- };
-
- lpc_host: lpc-host@80 {
- compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
- reg = <0x80 0x1e0>;
- reg-io-width = <4>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x80 0x1e0>;
- };
};

-BMC Node Children
-==================
-
-
-Host Node Children
-==================

LPC Host Interface Controller
-------------------
@@ -149,14 +92,12 @@ Optional properties:

Example:

-lpc-host@80 {
- lpc_ctrl: lpc-ctrl@0 {
- compatible = "aspeed,ast2500-lpc-ctrl";
- reg = <0x0 0x80>;
- clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
- memory-region = <&flash_memory>;
- flash = <&spi>;
- };
+lpc_ctrl: lpc-ctrl@80 {
+ compatible = "aspeed,ast2500-lpc-ctrl";
+ reg = <0x80 0x80>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
+ memory-region = <&flash_memory>;
+ flash = <&spi>;
};

LPC Host Controller
@@ -179,9 +120,9 @@ Required properties:

Example:

-lhc: lhc@20 {
+lhc: lhc@a0 {
compatible = "aspeed,ast2500-lhc";
- reg = <0x20 0x24 0x48 0x8>;
+ reg = <0xa0 0x24 0xc8 0x8>;
};

LPC reset control
@@ -192,16 +133,18 @@ state of the LPC bus. Some systems may chose to modify this configuration.

Required properties:

- - compatible: "aspeed,ast2600-lpc-reset" or
- "aspeed,ast2500-lpc-reset"
- "aspeed,ast2400-lpc-reset"
+ - compatible: One of:
+ "aspeed,ast2600-lpc-reset";
+ "aspeed,ast2500-lpc-reset";
+ "aspeed,ast2400-lpc-reset";
+
- reg: offset and length of the IP in the LHC memory region
- #reset-controller indicates the number of reset cells expected

Example:

-lpc_reset: reset-controller@18 {
+lpc_reset: reset-controller@98 {
compatible = "aspeed,ast2500-lpc-reset";
- reg = <0x18 0x4>;
+ reg = <0x98 0x4>;
#reset-cells = <1>;
};
--
2.17.1

2020-12-29 06:34:31

by ChiaWei Wang

[permalink] [raw]
Subject: [PATCH v4 3/5] ipmi: kcs: aspeed: Adapt to new LPC DTS layout

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang <[email protected]>
---
drivers/char/ipmi/kcs_bmc_aspeed.c | 27 ++++++++++++++++-----------
1 file changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c b/drivers/char/ipmi/kcs_bmc_aspeed.c
index a140203c079b..eefe362f65f0 100644
--- a/drivers/char/ipmi/kcs_bmc_aspeed.c
+++ b/drivers/char/ipmi/kcs_bmc_aspeed.c
@@ -27,7 +27,6 @@

#define KCS_CHANNEL_MAX 4

-/* mapped to lpc-bmc@0 IO space */
#define LPC_HICR0 0x000
#define LPC_HICR0_LPC3E BIT(7)
#define LPC_HICR0_LPC2E BIT(6)
@@ -52,15 +51,13 @@
#define LPC_STR1 0x03C
#define LPC_STR2 0x040
#define LPC_STR3 0x044
-
-/* mapped to lpc-host@80 IO space */
-#define LPC_HICRB 0x080
+#define LPC_HICRB 0x100
#define LPC_HICRB_IBFIF4 BIT(1)
#define LPC_HICRB_LPC4E BIT(0)
-#define LPC_LADR4 0x090
-#define LPC_IDR4 0x094
-#define LPC_ODR4 0x098
-#define LPC_STR4 0x09C
+#define LPC_LADR4 0x110
+#define LPC_IDR4 0x114
+#define LPC_ODR4 0x118
+#define LPC_STR4 0x11C

struct aspeed_kcs_bmc {
struct regmap *map;
@@ -348,12 +345,20 @@ static int aspeed_kcs_probe(struct platform_device *pdev)
struct device_node *np;
int rc;

- np = pdev->dev.of_node;
+ np = dev->of_node->parent;
+ if (!of_device_is_compatible(np, "aspeed,ast2400-lpc-v2") &&
+ !of_device_is_compatible(np, "aspeed,ast2500-lpc-v2") &&
+ !of_device_is_compatible(np, "aspeed,ast2600-lpc-v2")) {
+ dev_err(dev, "unsupported LPC device binding\n");
+ return -ENODEV;
+ }
+
+ np = dev->of_node;
if (of_device_is_compatible(np, "aspeed,ast2400-kcs-bmc") ||
- of_device_is_compatible(np, "aspeed,ast2500-kcs-bmc"))
+ of_device_is_compatible(np, "aspeed,ast2500-kcs-bmc"))
kcs_bmc = aspeed_kcs_probe_of_v1(pdev);
else if (of_device_is_compatible(np, "aspeed,ast2400-kcs-bmc-v2") ||
- of_device_is_compatible(np, "aspeed,ast2500-kcs-bmc-v2"))
+ of_device_is_compatible(np, "aspeed,ast2500-kcs-bmc-v2"))
kcs_bmc = aspeed_kcs_probe_of_v2(pdev);
else
return -EINVAL;
--
2.17.1

2020-12-29 06:34:48

by ChiaWei Wang

[permalink] [raw]
Subject: [PATCH v4 4/5] pinctrl: aspeed-g5: Adapt to new LPC device tree layout

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang <[email protected]>
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 0cab4c2576e2..996ebcba4d38 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -60,7 +60,7 @@
#define COND2 { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }

/* LHCR0 is offset from the end of the H8S/2168-compatible registers */
-#define LHCR0 0x20
+#define LHCR0 0xa0
#define GFX064 0x64

#define B14 0
@@ -2648,14 +2648,19 @@ static struct regmap *aspeed_g5_acquire_regmap(struct aspeed_pinmux_data *ctx,
}

if (ip == ASPEED_IP_LPC) {
- struct device_node *node;
+ struct device_node *np;
struct regmap *map;

- node = of_parse_phandle(ctx->dev->of_node,
+ np = of_parse_phandle(ctx->dev->of_node,
"aspeed,external-nodes", 1);
- if (node) {
- map = syscon_node_to_regmap(node->parent);
- of_node_put(node);
+ if (np) {
+ if (!of_device_is_compatible(np->parent, "aspeed,ast2400-lpc-v2") &&
+ !of_device_is_compatible(np->parent, "aspeed,ast2500-lpc-v2") &&
+ !of_device_is_compatible(np->parent, "aspeed,ast2600-lpc-v2"))
+ return ERR_PTR(-ENODEV);
+
+ map = syscon_node_to_regmap(np->parent);
+ of_node_put(np);
if (IS_ERR(map))
return map;
} else
--
2.17.1

2020-12-29 06:36:15

by ChiaWei Wang

[permalink] [raw]
Subject: [PATCH v4 5/5] soc: aspeed: Adapt to new LPC device tree layout

Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei, Wang <[email protected]>
---
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 20 ++++++++++++++------
drivers/soc/aspeed/aspeed-lpc-snoop.c | 23 +++++++++++++++--------
2 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/drivers/soc/aspeed/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
index 439bcd6b8c4a..c557ffd0992c 100644
--- a/drivers/soc/aspeed/aspeed-lpc-ctrl.c
+++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c
@@ -18,15 +18,15 @@

#define DEVICE_NAME "aspeed-lpc-ctrl"

-#define HICR5 0x0
+#define HICR5 0x80
#define HICR5_ENL2H BIT(8)
#define HICR5_ENFWH BIT(10)

-#define HICR6 0x4
+#define HICR6 0x84
#define SW_FWH2AHB BIT(17)

-#define HICR7 0x8
-#define HICR8 0xc
+#define HICR7 0x88
+#define HICR8 0x8c

struct aspeed_lpc_ctrl {
struct miscdevice miscdev;
@@ -215,6 +215,7 @@ static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
struct device_node *node;
struct resource resm;
struct device *dev;
+ struct device_node *np;
int rc;

dev = &pdev->dev;
@@ -270,8 +271,15 @@ static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
}
}

- lpc_ctrl->regmap = syscon_node_to_regmap(
- pdev->dev.parent->of_node);
+ np = pdev->dev.parent->of_node;
+ if (!of_device_is_compatible(np, "aspeed,ast2400-lpc-v2") &&
+ !of_device_is_compatible(np, "aspeed,ast2500-lpc-v2") &&
+ !of_device_is_compatible(np, "aspeed,ast2600-lpc-v2")) {
+ dev_err(dev, "unsupported LPC device binding\n");
+ return -ENODEV;
+ }
+
+ lpc_ctrl->regmap = syscon_node_to_regmap(np);
if (IS_ERR(lpc_ctrl->regmap)) {
dev_err(dev, "Couldn't get regmap\n");
return -ENODEV;
diff --git a/drivers/soc/aspeed/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c
index 682ba0eb4eba..ab0f0a54fea6 100644
--- a/drivers/soc/aspeed/aspeed-lpc-snoop.c
+++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c
@@ -28,26 +28,25 @@
#define NUM_SNOOP_CHANNELS 2
#define SNOOP_FIFO_SIZE 2048

-#define HICR5 0x0
+#define HICR5 0x80
#define HICR5_EN_SNP0W BIT(0)
#define HICR5_ENINT_SNP0W BIT(1)
#define HICR5_EN_SNP1W BIT(2)
#define HICR5_ENINT_SNP1W BIT(3)
-
-#define HICR6 0x4
+#define HICR6 0x84
#define HICR6_STR_SNP0W BIT(0)
#define HICR6_STR_SNP1W BIT(1)
-#define SNPWADR 0x10
+#define SNPWADR 0x90
#define SNPWADR_CH0_MASK GENMASK(15, 0)
#define SNPWADR_CH0_SHIFT 0
#define SNPWADR_CH1_MASK GENMASK(31, 16)
#define SNPWADR_CH1_SHIFT 16
-#define SNPWDR 0x14
+#define SNPWDR 0x94
#define SNPWDR_CH0_MASK GENMASK(7, 0)
#define SNPWDR_CH0_SHIFT 0
#define SNPWDR_CH1_MASK GENMASK(15, 8)
#define SNPWDR_CH1_SHIFT 8
-#define HICRB 0x80
+#define HICRB 0x100
#define HICRB_ENSNP0D BIT(14)
#define HICRB_ENSNP1D BIT(15)

@@ -258,6 +257,7 @@ static int aspeed_lpc_snoop_probe(struct platform_device *pdev)
{
struct aspeed_lpc_snoop *lpc_snoop;
struct device *dev;
+ struct device_node *np;
u32 port;
int rc;

@@ -267,8 +267,15 @@ static int aspeed_lpc_snoop_probe(struct platform_device *pdev)
if (!lpc_snoop)
return -ENOMEM;

- lpc_snoop->regmap = syscon_node_to_regmap(
- pdev->dev.parent->of_node);
+ np = pdev->dev.parent->of_node;
+ if (!of_device_is_compatible(np, "aspeed,ast2400-lpc-v2") &&
+ !of_device_is_compatible(np, "aspeed,ast2500-lpc-v2") &&
+ !of_device_is_compatible(np, "aspeed,ast2600-lpc-v2")) {
+ dev_err(dev, "unsupported LPC device binding\n");
+ return -ENODEV;
+ }
+
+ lpc_snoop->regmap = syscon_node_to_regmap(np);
if (IS_ERR(lpc_snoop->regmap)) {
dev_err(dev, "Couldn't get regmap\n");
return -ENODEV;
--
2.17.1

2020-12-29 14:56:35

by Haiyue Wang

[permalink] [raw]
Subject: Re: [PATCH v4 3/5] ipmi: kcs: aspeed: Adapt to new LPC DTS layout

On 12/29/2020 14:31, Chia-Wei, Wang wrote:
> Add check against LPC device v2 compatible string to
> ensure that the fixed device tree layout is adopted.
> The LPC register offsets are also fixed accordingly.
>
> Signed-off-by: Chia-Wei, Wang<[email protected]>
> ---
> drivers/char/ipmi/kcs_bmc_aspeed.c | 27 ++++++++++++++++-----------
> 1 file changed, 16 insertions(+), 11 deletions(-)

Acked-by: Haiyue Wang <[email protected]>



2021-01-11 20:40:59

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning

On Tue, Dec 29, 2020 at 02:31:53PM +0800, Chia-Wei, Wang wrote:
> The LPC controller has no concept of the BMC and the Host partitions.
> This patch fixes the documentation by removing the description on LPC
> partitions. The register offsets illustrated in the DTS node examples
> are also fixed to adapt to the LPC DTS change.
>
> Signed-off-by: Chia-Wei, Wang <[email protected]>
> ---
> .../devicetree/bindings/mfd/aspeed-lpc.txt | 99 ++++---------------
> 1 file changed, 21 insertions(+), 78 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> index d0a38ba8b9ce..90eb0ecc95d1 100644
> --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a slave on the bus
> conditions it can also take the role of bus master.
>
> The LPC controller is represented as a multi-function device to account for the
> -mix of functionality it provides. The principle split is between the register
> -layout at the start of the I/O space which is, to quote the Aspeed datasheet,
> -"basically compatible with the [LPC registers from the] popular BMC controller
> -H8S/2168[1]", and everything else, where everything else is an eclectic
> -collection of functions with a esoteric register layout. "Everything else",
> -here labeled the "host" portion of the controller, includes, but is not limited
> -to:
> +mix of functionality, which includes, but is not limited to:
>
> * An IPMI Block Transfer[2] Controller
>
> @@ -44,80 +38,29 @@ Required properties
> ===================
>
> - compatible: One of:
> - "aspeed,ast2400-lpc", "simple-mfd"
> - "aspeed,ast2500-lpc", "simple-mfd"
> - "aspeed,ast2600-lpc", "simple-mfd"
> + "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon"
> + "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"
> + "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"
>
> - reg: contains the physical address and length values of the Aspeed
> LPC memory region.
>
> - #address-cells: <1>
> - #size-cells: <1>
> -- ranges: Maps 0 to the physical address and length of the LPC memory
> - region
> -
> -Required LPC Child nodes
> -========================
> -
> -BMC Node
> ---------
> -
> -- compatible: One of:
> - "aspeed,ast2400-lpc-bmc"
> - "aspeed,ast2500-lpc-bmc"
> - "aspeed,ast2600-lpc-bmc"
> -
> -- reg: contains the physical address and length values of the
> - H8S/2168-compatible LPC controller memory region
> -
> -Host Node
> ----------
> -
> -- compatible: One of:
> - "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
> - "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
> - "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
> -
> -- reg: contains the address and length values of the host-related
> - register space for the Aspeed LPC controller
> -
> -- #address-cells: <1>
> -- #size-cells: <1>
> -- ranges: Maps 0 to the address and length of the host-related LPC memory
> +- ranges: Maps 0 to the physical address and length of the LPC memory
> region
>
> Example:
>
> lpc: lpc@1e789000 {
> - compatible = "aspeed,ast2500-lpc", "simple-mfd";
> + compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
> reg = <0x1e789000 0x1000>;
>
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0x0 0x1e789000 0x1000>;

No child nodes? Then you don't need 'ranges', '#size-cells', nor
'#address-cells'.

> -
> - lpc_bmc: lpc-bmc@0 {
> - compatible = "aspeed,ast2500-lpc-bmc";
> - reg = <0x0 0x80>;
> - };
> -
> - lpc_host: lpc-host@80 {
> - compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
> - reg = <0x80 0x1e0>;
> - reg-io-width = <4>;
> -
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0x0 0x80 0x1e0>;
> - };
> };
>
> -BMC Node Children
> -==================
> -
> -
> -Host Node Children
> -==================
>
> LPC Host Interface Controller
> -------------------
> @@ -149,14 +92,12 @@ Optional properties:
>
> Example:
>
> -lpc-host@80 {
> - lpc_ctrl: lpc-ctrl@0 {
> - compatible = "aspeed,ast2500-lpc-ctrl";
> - reg = <0x0 0x80>;
> - clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> - memory-region = <&flash_memory>;
> - flash = <&spi>;
> - };
> +lpc_ctrl: lpc-ctrl@80 {
> + compatible = "aspeed,ast2500-lpc-ctrl";
> + reg = <0x80 0x80>;
> + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> + memory-region = <&flash_memory>;
> + flash = <&spi>;
> };
>
> LPC Host Controller
> @@ -179,9 +120,9 @@ Required properties:
>
> Example:
>
> -lhc: lhc@20 {
> +lhc: lhc@a0 {
> compatible = "aspeed,ast2500-lhc";
> - reg = <0x20 0x24 0x48 0x8>;
> + reg = <0xa0 0x24 0xc8 0x8>;
> };
>
> LPC reset control
> @@ -192,16 +133,18 @@ state of the LPC bus. Some systems may chose to modify this configuration.
>
> Required properties:
>
> - - compatible: "aspeed,ast2600-lpc-reset" or
> - "aspeed,ast2500-lpc-reset"
> - "aspeed,ast2400-lpc-reset"
> + - compatible: One of:
> + "aspeed,ast2600-lpc-reset";
> + "aspeed,ast2500-lpc-reset";
> + "aspeed,ast2400-lpc-reset";
> +
> - reg: offset and length of the IP in the LHC memory region
> - #reset-controller indicates the number of reset cells expected
>
> Example:
>
> -lpc_reset: reset-controller@18 {
> +lpc_reset: reset-controller@98 {
> compatible = "aspeed,ast2500-lpc-reset";
> - reg = <0x18 0x4>;
> + reg = <0x98 0x4>;
> #reset-cells = <1>;
> };
> --
> 2.17.1
>

2021-01-12 11:10:57

by ChiaWei Wang

[permalink] [raw]
Subject: RE: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning

Hi Rob,

> -----Original Message-----
> From: Rob Herring <[email protected]>
> Sent: Tuesday, January 12, 2021 4:39 AM
> To: ChiaWei Wang <[email protected]>
> [email protected]; [email protected]
> Subject: Re: [PATCH v4 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
>
> On Tue, Dec 29, 2020 at 02:31:53PM +0800, Chia-Wei, Wang wrote:
> > The LPC controller has no concept of the BMC and the Host partitions.
> > This patch fixes the documentation by removing the description on LPC
> > partitions. The register offsets illustrated in the DTS node examples
> > are also fixed to adapt to the LPC DTS change.
> >
> > Signed-off-by: Chia-Wei, Wang <[email protected]>
> > ---
> > .../devicetree/bindings/mfd/aspeed-lpc.txt | 99 ++++---------------
> > 1 file changed, 21 insertions(+), 78 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > index d0a38ba8b9ce..90eb0ecc95d1 100644
> > --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a
> > slave on the bus conditions it can also take the role of bus master.
> >
> > The LPC controller is represented as a multi-function device to
> > account for the -mix of functionality it provides. The principle split
> > is between the register -layout at the start of the I/O space which
> > is, to quote the Aspeed datasheet, -"basically compatible with the
> > [LPC registers from the] popular BMC controller -H8S/2168[1]", and
> > everything else, where everything else is an eclectic -collection of
> > functions with a esoteric register layout. "Everything else", -here
> > labeled the "host" portion of the controller, includes, but is not
> > limited
> > -to:
> > +mix of functionality, which includes, but is not limited to:
> >
> > * An IPMI Block Transfer[2] Controller
> >
> > @@ -44,80 +38,29 @@ Required properties ===================
> >
> > - compatible: One of:
> > - "aspeed,ast2400-lpc", "simple-mfd"
> > - "aspeed,ast2500-lpc", "simple-mfd"
> > - "aspeed,ast2600-lpc", "simple-mfd"
> > + "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon"
> > + "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"
> > + "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"
> >
> > - reg: contains the physical address and length values of the Aspeed
> > LPC memory region.
> >
> > - #address-cells: <1>
> > - #size-cells: <1>
> > -- ranges: Maps 0 to the physical address and length of the LPC memory
> > - region
> > -
> > -Required LPC Child nodes
> > -========================
> > -
> > -BMC Node
> > ---------
> > -
> > -- compatible: One of:
> > - "aspeed,ast2400-lpc-bmc"
> > - "aspeed,ast2500-lpc-bmc"
> > - "aspeed,ast2600-lpc-bmc"
> > -
> > -- reg: contains the physical address and length values of the
> > - H8S/2168-compatible LPC controller memory region
> > -
> > -Host Node
> > ----------
> > -
> > -- compatible: One of:
> > - "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
> > - "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
> > - "aspeed,ast2600-lpc-host", "simple-mfd", "syscon"
> > -
> > -- reg: contains the address and length values of the host-related
> > - register space for the Aspeed LPC controller
> > -
> > -- #address-cells: <1>
> > -- #size-cells: <1>
> > -- ranges: Maps 0 to the address and length of the host-related LPC
> memory
> > +- ranges: Maps 0 to the physical address and length of the LPC memory
> > region
> >
> > Example:
> >
> > lpc: lpc@1e789000 {
> > - compatible = "aspeed,ast2500-lpc", "simple-mfd";
> > + compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
> > reg = <0x1e789000 0x1000>;
> >
> > #address-cells = <1>;
> > #size-cells = <1>;
> > ranges = <0x0 0x1e789000 0x1000>;
>
> No child nodes? Then you don't need 'ranges', '#size-cells', nor '#address-cells'.
>
There are child nodes in LPC, should I list all of them or just few for the example?

Chiawei

> > -
> > - lpc_bmc: lpc-bmc@0 {
> > - compatible = "aspeed,ast2500-lpc-bmc";
> > - reg = <0x0 0x80>;
> > - };
> > -
> > - lpc_host: lpc-host@80 {
> > - compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
> > - reg = <0x80 0x1e0>;
> > - reg-io-width = <4>;
> > -
> > - #address-cells = <1>;
> > - #size-cells = <1>;
> > - ranges = <0x0 0x80 0x1e0>;
> > - };
> > };
> >
> > -BMC Node Children
> > -==================
> > -
> > -
> > -Host Node Children
> > -==================
> >
> > LPC Host Interface Controller
> > -------------------
> > @@ -149,14 +92,12 @@ Optional properties:
> >
> > Example:
> >
> > -lpc-host@80 {
> > - lpc_ctrl: lpc-ctrl@0 {
> > - compatible = "aspeed,ast2500-lpc-ctrl";
> > - reg = <0x0 0x80>;
> > - clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> > - memory-region = <&flash_memory>;
> > - flash = <&spi>;
> > - };
> > +lpc_ctrl: lpc-ctrl@80 {
> > + compatible = "aspeed,ast2500-lpc-ctrl";
> > + reg = <0x80 0x80>;
> > + clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> > + memory-region = <&flash_memory>;
> > + flash = <&spi>;
> > };
> >
> > LPC Host Controller
> > @@ -179,9 +120,9 @@ Required properties:
> >
> > Example:
> >
> > -lhc: lhc@20 {
> > +lhc: lhc@a0 {
> > compatible = "aspeed,ast2500-lhc";
> > - reg = <0x20 0x24 0x48 0x8>;
> > + reg = <0xa0 0x24 0xc8 0x8>;
> > };
> >
> > LPC reset control
> > @@ -192,16 +133,18 @@ state of the LPC bus. Some systems may chose to
> modify this configuration.
> >
> > Required properties:
> >
> > - - compatible: "aspeed,ast2600-lpc-reset" or
> > - "aspeed,ast2500-lpc-reset"
> > - "aspeed,ast2400-lpc-reset"
> > + - compatible: One of:
> > + "aspeed,ast2600-lpc-reset";
> > + "aspeed,ast2500-lpc-reset";
> > + "aspeed,ast2400-lpc-reset";
> > +
> > - reg: offset and length of the IP in the LHC memory region
> > - #reset-controller indicates the number of reset cells expected
> >
> > Example:
> >
> > -lpc_reset: reset-controller@18 {
> > +lpc_reset: reset-controller@98 {
> > compatible = "aspeed,ast2500-lpc-reset";
> > - reg = <0x18 0x4>;
> > + reg = <0x98 0x4>;
> > #reset-cells = <1>;
> > };
> > --
> > 2.17.1
> >