AM64 uses the same PCIe controller as in J7200, however AM642 EVM
doesn't have a clock generator (unlike J7200 base board). Here
the clock from the SERDES has to be routed to the PCIE connector.
This series provides an option for the pci-j721e.c driver to
drive reference clock output to the connector.
v1 of the patch series can be found @ [1]
Changes from v1:
*) Fixed missing initialization of "ret" variable in the error path.
[1] -> http://lore.kernel.org/r/[email protected]
Kishon Vijay Abraham I (4):
dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the
connector
dt-bindings: pci: ti,j721e: Add host mode dt-bindings for TI's AM64
SoC
dt-bindings: pci: ti,j721e: Add endpoint mode dt-bindings for TI's
AM64 SoC
PCI: j721e: Add support to provide refclk to PCIe connector
.../bindings/pci/ti,j721e-pci-ep.yaml | 10 ++++---
.../bindings/pci/ti,j721e-pci-host.yaml | 27 ++++++++++++++-----
drivers/pci/controller/cadence/pci-j721e.c | 18 +++++++++++++
3 files changed, 45 insertions(+), 10 deletions(-)
--
2.17.1
Add host mode dt-bindings for TI's AM64 SoC. This is the same IP used in
J7200, however AM64 is a non-coherent architecture.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
---
.../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
index 7607018a115b..77118dba415e 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
@@ -16,12 +16,17 @@ allOf:
properties:
compatible:
oneOf:
- - description: PCIe controller in J7200
+ - const: ti,am64-pcie-host
+ - const: ti,j7200-pcie-host
+ - const: ti,j721e-pcie-host
+ - description: PCIe controller in AM64
items:
+ - const: ti,am64-pcie-host
- const: ti,j7200-pcie-host
- const: ti,j721e-pcie-host
- - description: PCIe controller in J721E
+ - description: PCIe controller in J7200
items:
+ - const: ti,j7200-pcie-host
- const: ti,j721e-pcie-host
reg:
@@ -87,7 +92,6 @@ required:
- vendor-id
- device-id
- msi-map
- - dma-coherent
- dma-ranges
- ranges
- reset-gpios
--
2.17.1
On Mon, Jan 04, 2021 at 06:11:01PM +0530, Kishon Vijay Abraham I wrote:
> Add host mode dt-bindings for TI's AM64 SoC. This is the same IP used in
> J7200, however AM64 is a non-coherent architecture.
>
> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
> ---
> .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> index 7607018a115b..77118dba415e 100644
> --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> @@ -16,12 +16,17 @@ allOf:
> properties:
> compatible:
> oneOf:
> - - description: PCIe controller in J7200
> + - const: ti,am64-pcie-host
No, either you have fallback or you don't.
> + - const: ti,j7200-pcie-host
> + - const: ti,j721e-pcie-host
> + - description: PCIe controller in AM64
> items:
> + - const: ti,am64-pcie-host
> - const: ti,j7200-pcie-host
> - const: ti,j721e-pcie-host
2 fallbacks is probably not too useful. Do those really enable
anything?
> - - description: PCIe controller in J721E
> + - description: PCIe controller in J7200
> items:
> + - const: ti,j7200-pcie-host
> - const: ti,j721e-pcie-host
>
> reg:
> @@ -87,7 +92,6 @@ required:
> - vendor-id
> - device-id
> - msi-map
> - - dma-coherent
> - dma-ranges
> - ranges
> - reset-gpios
> --
> 2.17.1
>