2021-03-02 22:57:31

by Sergio Paracuellos

Subject: [PATCH] phy: ralink: phy-mt7621-pci: fix XTAL bitmask

When this was rewriten to get mainlined and start to
use 'linux/bitfield.h' headers, XTAL_MASK was wrong.
It must mask three bits but only two were used. Hence
properly fix it to make things work.

Fixes: d87da32372a0 ("phy: ralink: Add PHY driver for MT7621 PCIe PHY")
Signed-off-by: Sergio Paracuellos <[email protected]>
---
drivers/phy/ralink/phy-mt7621-pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/phy/ralink/phy-mt7621-pci.c b/drivers/phy/ralink/phy-mt7621-pci.c
index 9a610b414b1f..84ee2b5c2228 100644
--- a/drivers/phy/ralink/phy-mt7621-pci.c
+++ b/drivers/phy/ralink/phy-mt7621-pci.c
@@ -62,7 +62,7 @@

#define RG_PE1_FRC_MSTCKDIV BIT(5)

-#define XTAL_MASK GENMASK(7, 6)
+#define XTAL_MASK GENMASK(8, 6)

#define MAX_PHYS 2

--
2.25.1

2021-03-04 06:22:54

by Vinod Koul

Subject: Re: [PATCH] phy: ralink: phy-mt7621-pci: fix XTAL bitmask

On 02-03-21, 11:54, Sergio Paracuellos wrote:
> When this was rewriten to get mainlined and start to
> use 'linux/bitfield.h' headers, XTAL_MASK was wrong.
> It must mask three bits but only two were used. Hence
> properly fix it to make things work.

Applied, thanks

--
~Vinod