Hi Adrien,
On 21-03-08 13:39, Adrien Grassein wrote:
> Add the description for espi support.
>
> Signed-off-by: Adrien Grassein <[email protected]>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> index 4f4cf7df5a5a..0c5949b40eeb 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> @@ -52,6 +52,19 @@ &A53_3 {
> cpu-supply = <®_buck3>;
> };
>
> +/* J15 */
> +&ecspi2 {
> + assigned-clocks = <&clk IMX8MM_CLK_ECSPI2>;
> + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>;
> + assigned-clock-rates = <40000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ecspi2>;
> + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> + #address-cells = <1>;
> + #size-cells = <0>;
Nit: These two properties should be added to the base dtsi if not
already done.
Regards,
Marco
> + status = "okay";
> +};
> +
> &fec1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_fec1>;
> @@ -286,6 +299,15 @@ &iomuxc {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_hog>;
>
> + pinctrl_ecspi2: ecspi2grp {
> + fsl,pins = <
> + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140
> + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x19
> + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x19
> + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x19
> + >;
> + };
> +
> pinctrl_fec1: fec1grp {
> fsl,pins = <
> MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
> --
> 2.25.1
>
>
>
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