These patches improve bmips bcm63xx device tree nodes.
Álvaro Fernández Rojas (5):
mips: bmips: fix syscon-reboot nodes
mips: bmips: bcm6328: populate device tree nodes
mips: bmips: bcm6358: populate device tree nodes
mips: bmips: bcm6362: populate device tree nodes
mips: bmips: bcm6368: populate device tree nodes
arch/mips/boot/dts/brcm/bcm3368.dtsi | 2 +-
arch/mips/boot/dts/brcm/bcm63268.dtsi | 2 +-
arch/mips/boot/dts/brcm/bcm6328.dtsi | 119 +++++++++++++++++++++---
arch/mips/boot/dts/brcm/bcm6358.dtsi | 85 ++++++++++++++---
arch/mips/boot/dts/brcm/bcm6362.dtsi | 129 +++++++++++++++++++++++---
arch/mips/boot/dts/brcm/bcm6368.dtsi | 129 +++++++++++++++++++++++---
6 files changed, 414 insertions(+), 52 deletions(-)
--
2.20.1
- Rename periph_clk to periph_osc.
- Rename clkctl to periph_clk.
- Move syscon-reboot to subnode.
- Add hsspi-osc clock.
- Add watchdog.
- Add HS SPI controller.
- Add NAND controller.
- Add USBH PHY.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm6328.dtsi | 119 +++++++++++++++++++++++----
1 file changed, 105 insertions(+), 14 deletions(-)
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index fe93f2692281..634618d4377e 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -29,16 +29,26 @@
};
clocks {
- periph_clk: periph-clk {
+ periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+
+ hsspi_osc: hsspi-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <133333333>;
+ clock-output-names = "hsspi_osc";
};
};
aliases {
+ nflash = &nflash;
serial0 = &uart0;
serial1 = &uart1;
+ spi1 = &hsspi;
};
cpu_intc: interrupt-controller {
@@ -56,7 +66,7 @@
compatible = "simple-bus";
ranges;
- clkctl: clock-controller@10000004 {
+ periph_clk: clock-controller@10000004 {
compatible = "brcm,bcm6328-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
@@ -80,37 +90,71 @@
interrupts = <2>, <3>;
};
+ wdt: watchdog@1000005c {
+ compatible = "brcm,bcm7038-wdt";
+ reg = <0x1000005c 0xc>;
+
+ clocks = <&periph_osc>;
+ clock-names = "refclk";
+
+ timeout-sec = <30>;
+ };
+
+ soft_reset: syscon@10000068 {
+ compatible = "syscon";
+ reg = <0x10000068 0x4>;
+ native-endian;
+
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
+ };
+
uart0: serial@10000100 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000100 0x18>;
+
interrupt-parent = <&periph_intc>;
interrupts = <28>;
- clocks = <&periph_clk>;
+
+ clocks = <&periph_osc>;
clock-names = "refclk";
+
status = "disabled";
};
uart1: serial@10000120 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000120 0x18>;
+
interrupt-parent = <&periph_intc>;
interrupts = <39>;
- clocks = <&periph_clk>;
+
+ clocks = <&periph_osc>;
clock-names = "refclk";
+
status = "disabled";
};
- timer: syscon@10000040 {
- compatible = "syscon";
- reg = <0x10000040 0x2c>;
- native-endian;
- };
+ nflash: nand@10000200 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm6368",
+ "brcm,brcmnand-v2.2",
+ "brcm,brcmnand";
+ reg = <0x10000200 0x180>,
+ <0x10000400 0x200>,
+ <0x10000070 0x10>;
+ reg-names = "nand",
+ "nand-cache",
+ "nand-int-base";
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <0>;
- reboot: syscon-reboot@10000068 {
- compatible = "syscon-reboot";
- regmap = <&timer>;
- offset = <0x28>;
- mask = <0x1>;
+ status = "disabled";
};
leds0: led-controller@10000800 {
@@ -118,6 +162,27 @@
#size-cells = <0>;
compatible = "brcm,bcm6328-leds";
reg = <0x10000800 0x24>;
+
+ status = "disabled";
+ };
+
+ hsspi: spi@10001000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <29>;
+
+ clocks = <&periph_clk BCM6328_CLK_HSSPI>,
+ <&hsspi_osc>;
+ clock-names = "hsspi",
+ "pll";
+
+ resets = <&periph_rst BCM6328_RST_SPI>;
+ reset-names = "hsspi";
+
status = "disabled";
};
@@ -131,8 +196,13 @@
compatible = "brcm,bcm6328-ehci", "generic-ehci";
reg = <0x10002500 0x100>;
big-endian;
+
interrupt-parent = <&periph_intc>;
interrupts = <42>;
+
+ phys = <&usbh 0>;
+ phy-names = "usb";
+
status = "disabled";
};
@@ -141,8 +211,29 @@
reg = <0x10002600 0x100>;
big-endian;
no-big-frame-no;
+
interrupt-parent = <&periph_intc>;
interrupts = <41>;
+
+ phys = <&usbh 0>;
+ phy-names = "usb";
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@10002700 {
+ compatible = "brcm,bcm6328-usbh-phy";
+ reg = <0x10002700 0x38>;
+ #phy-cells = <1>;
+
+ clocks = <&periph_clk BCM6328_CLK_USBH>;
+ clock-names = "usbh";
+
+ power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
+
+ resets = <&periph_rst BCM6328_RST_USBH>;
+ reset-names = "usbh";
+
status = "disabled";
};
};
--
2.20.1
- Rename periph_clk to periph_osc.
- Rename clkctl to periph_clk.
- Move syscon-reboot to subnode.
- Add watchdog.
- Add SPI controller.
- Add USBH PHY.
- Add cfi-flash.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm6358.dtsi | 83 ++++++++++++++++++++++++----
1 file changed, 72 insertions(+), 11 deletions(-)
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index f5549a056bff..777c4379ed03 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -28,16 +28,19 @@
};
clocks {
- periph_clk: periph-clk {
+ periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
+ clock-output-names = "periph";
};
};
aliases {
+ pflash = &pflash;
serial0 = &uart0;
serial1 = &uart1;
+ spi0 = &lsspi;
};
cpu_intc: interrupt-controller {
@@ -55,23 +58,22 @@
compatible = "simple-bus";
ranges;
- clkctl: clock-controller@fffe0004 {
+ periph_clk: clock-controller@fffe0004 {
compatible = "brcm,bcm6358-clocks";
reg = <0xfffe0004 0x4>;
#clock-cells = <1>;
};
- periph_cntl: syscon@fffe0008 {
+ pll_cntl: syscon@fffe0008 {
compatible = "syscon";
reg = <0xfffe0008 0x4>;
native-endian;
- };
- reboot: syscon-reboot@fffe0008 {
- compatible = "syscon-reboot";
- regmap = <&periph_cntl>;
- offset = <0x0>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
periph_intc: interrupt-controller@fffe000c {
@@ -92,6 +94,16 @@
#reset-cells = <1>;
};
+ wdt: watchdog@fffe005c {
+ compatible = "brcm,bcm7038-wdt";
+ reg = <0xfffe005c 0xc>;
+
+ clocks = <&periph_osc>;
+ clock-names = "refclk";
+
+ timeout-sec = <30>;
+ };
+
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
@@ -108,7 +120,7 @@
interrupt-parent = <&periph_intc>;
interrupts = <2>;
- clocks = <&periph_clk>;
+ clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
@@ -121,18 +133,41 @@
interrupt-parent = <&periph_intc>;
interrupts = <3>;
- clocks = <&periph_clk>;
+ clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
+ lsspi: spi@fffe0800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0xfffe0800 0x70c>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <1>;
+
+ clocks = <&periph_clk BCM6358_CLK_SPI>;
+ clock-names = "spi";
+
+ resets = <&periph_rst BCM6358_RST_SPI>;
+ reset-names = "spi";
+
+ status = "disabled";
+ };
+
ehci: usb@fffe1300 {
compatible = "brcm,bcm6358-ehci", "generic-ehci";
reg = <0xfffe1300 0x100>;
big-endian;
+
interrupt-parent = <&periph_intc>;
interrupts = <10>;
+
+ phys = <&usbh 0>;
+ phy-names = "usb";
+
status = "disabled";
};
@@ -141,9 +176,35 @@
reg = <0xfffe1400 0x100>;
big-endian;
no-big-frame-no;
+
interrupt-parent = <&periph_intc>;
interrupts = <5>;
+
+ phys = <&usbh 0>;
+ phy-names = "usb";
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@fffe1500 {
+ compatible = "brcm,bcm6358-usbh-phy";
+ reg = <0xfffe1500 0x38>;
+ #phy-cells = <1>;
+
+ resets = <&periph_rst BCM6358_RST_USBH>;
+ reset-names = "usbh";
+
status = "disabled";
};
};
+
+ pflash: nor@1e000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x1e000000 0x2000000>;
+ bank-width = <2>;
+
+ status = "disabled";
+ };
};
--
2.20.1
Commit a23c4134955e added the clock controller nodes, incorrectly changing the
syscon-reboot nodes addresses.
Fixes: a23c4134955e ("MIPS: BMIPS: add clock controller nodes")
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm3368.dtsi | 2 +-
arch/mips/boot/dts/brcm/bcm63268.dtsi | 2 +-
arch/mips/boot/dts/brcm/bcm6358.dtsi | 2 +-
arch/mips/boot/dts/brcm/bcm6362.dtsi | 2 +-
arch/mips/boot/dts/brcm/bcm6368.dtsi | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/mips/boot/dts/brcm/bcm3368.dtsi b/arch/mips/boot/dts/brcm/bcm3368.dtsi
index db7e801dad55..883ca8bed8e7 100644
--- a/arch/mips/boot/dts/brcm/bcm3368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm3368.dtsi
@@ -62,7 +62,7 @@
periph_cntl: syscon@fff8c008 {
compatible = "syscon";
- reg = <0xfff8c000 0x4>;
+ reg = <0xfff8c008 0x4>;
native-endian;
};
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
index 575c9d3eb4c8..052d2032d4e4 100644
--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -64,7 +64,7 @@
periph_cntl: syscon@10000008 {
compatible = "syscon";
- reg = <0x10000000 0xc>;
+ reg = <0x10000008 0x4>;
native-endian;
};
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index f8753becc164..f5549a056bff 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -63,7 +63,7 @@
periph_cntl: syscon@fffe0008 {
compatible = "syscon";
- reg = <0xfffe0000 0x4>;
+ reg = <0xfffe0008 0x4>;
native-endian;
};
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index a2dbbf062cd8..50c287bedc37 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -64,7 +64,7 @@
periph_cntl: syscon@10000008 {
compatible = "syscon";
- reg = <0x10000000 0xc>;
+ reg = <0x10000008 0x4>;
native-endian;
};
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index c4eb4b67ecbd..4837b1436714 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -63,7 +63,7 @@
periph_cntl: syscon@100000008 {
compatible = "syscon";
- reg = <0x10000000 0xc>;
+ reg = <0x10000008 0x4>;
native-endian;
};
--
2.20.1
- Rename periph_clk to periph_osc.
- Rename clkctl to periph_clk.
- Move syscon-reboot to subnode.
- Add hsspi-osc clock.
- Add watchdog.
- Add SPI controller.
- Add HS SPI controller.
- Add NAND controller.
- Add USBH PHY.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm6362.dtsi | 127 ++++++++++++++++++++++++---
1 file changed, 116 insertions(+), 11 deletions(-)
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index 50c287bedc37..d74021925c53 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -29,16 +29,29 @@
};
clocks {
- periph_clk: periph-clk {
+ periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+
+ hsspi_osc: hsspi-osc {
+ compatible = "fixed-clock";
+
+ #clock-cells = <0>;
+
+ clock-frequency = <400000000>;
+ clock-output-names = "hsspi_osc";
};
};
aliases {
+ nflash = &nflash;
serial0 = &uart0;
serial1 = &uart1;
+ spi0 = &lsspi;
+ spi1 = &hsspi;
};
cpu_intc: interrupt-controller {
@@ -56,23 +69,22 @@
compatible = "simple-bus";
ranges;
- clkctl: clock-controller@10000004 {
+ periph_clk: clock-controller@10000004 {
compatible = "brcm,bcm6362-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
- periph_cntl: syscon@10000008 {
+ pll_cntl: syscon@10000008 {
compatible = "syscon";
reg = <0x10000008 0x4>;
native-endian;
- };
- reboot: syscon-reboot@10000008 {
- compatible = "syscon-reboot";
- regmap = <&periph_cntl>;
- offset = <0x0>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
periph_rst: reset-controller@10000010 {
@@ -93,6 +105,16 @@
interrupts = <2>, <3>;
};
+ wdt: watchdog@1000005c {
+ compatible = "brcm,bcm7038-wdt";
+ reg = <0x1000005c 0xc>;
+
+ clocks = <&periph_osc>;
+ clock-names = "refclk";
+
+ timeout-sec = <30>;
+ };
+
uart0: serial@10000100 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000100 0x18>;
@@ -100,7 +122,7 @@
interrupt-parent = <&periph_intc>;
interrupts = <3>;
- clocks = <&periph_clk>;
+ clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
@@ -113,12 +135,72 @@
interrupt-parent = <&periph_intc>;
interrupts = <4>;
- clocks = <&periph_clk>;
+ clocks = <&periph_osc>;
clock-names = "refclk";
status = "disabled";
};
+ nflash: nand@10000200 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm6368",
+ "brcm,brcmnand-v2.2",
+ "brcm,brcmnand";
+ reg = <0x10000200 0x180>,
+ <0x10000600 0x200>,
+ <0x10000070 0x10>;
+ reg-names = "nand",
+ "nand-cache",
+ "nand-int-base";
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <12>;
+
+ clocks = <&periph_clk BCM6362_CLK_NAND>;
+ clock-names = "nand";
+
+ status = "disabled";
+ };
+
+ lsspi: spi@10000800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ clocks = <&periph_clk BCM6362_CLK_SPI>;
+ clock-names = "spi";
+
+ resets = <&periph_rst BCM6362_RST_SPI>;
+ reset-names = "spi";
+
+ status = "disabled";
+ };
+
+ hsspi: spi@10001000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <5>;
+
+ clocks = <&periph_clk BCM6362_CLK_HSSPI>,
+ <&hsspi_osc>;
+ clock-names = "hsspi",
+ "pll";
+
+ resets = <&periph_rst BCM6362_RST_SPI>;
+ reset-names = "hsspi";
+
+ status = "disabled";
+ };
+
periph_pwr: power-controller@10001848 {
compatible = "brcm,bcm6362-power-controller";
reg = <0x10001848 0x4>;
@@ -142,6 +224,9 @@
interrupt-parent = <&periph_intc>;
interrupts = <10>;
+ phys = <&usbh 0>;
+ phy-names = "usb";
+
status = "disabled";
};
@@ -154,6 +239,26 @@
interrupt-parent = <&periph_intc>;
interrupts = <9>;
+ phys = <&usbh 0>;
+ phy-names = "usb";
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@10002700 {
+ compatible = "brcm,bcm6362-usbh-phy";
+ reg = <0x10002700 0x38>;
+
+ #phy-cells = <1>;
+
+ clocks = <&periph_clk BCM6362_CLK_USBH>;
+ clock-names = "usbh";
+
+ power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
+
+ resets = <&periph_rst BCM6362_RST_USBH>;
+ reset-names = "usbh";
+
status = "disabled";
};
};
--
2.20.1
- Rename periph_clk to periph_osc.
- Rename clkctl to periph_clk.
- Move syscon-reboot to subnode.
- Add watchdog controller.
- Add SPI controller.
- Add NAND controller.
- Add USBH PHY controller.
- Add RNG controller.
- Add cfi-flash controller.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
---
arch/mips/boot/dts/brcm/bcm6368.dtsi | 127 ++++++++++++++++++++++++---
1 file changed, 116 insertions(+), 11 deletions(-)
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index 4837b1436714..fc15e200877d 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -28,16 +28,20 @@
};
clocks {
- periph_clk: periph-clk {
+ periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
+ clock-output-names = "periph";
};
};
aliases {
+ nflash = &nflash;
+ pflash = &pflash;
serial0 = &uart0;
serial1 = &uart1;
+ spi0 = &lsspi;
};
cpu_intc: interrupt-controller {
@@ -55,23 +59,22 @@
compatible = "simple-bus";
ranges;
- clkctl: clock-controller@10000004 {
+ periph_clk: clock-controller@10000004 {
compatible = "brcm,bcm6368-clocks";
reg = <0x10000004 0x4>;
#clock-cells = <1>;
};
- periph_cntl: syscon@100000008 {
+ pll_cntl: syscon@100000008 {
compatible = "syscon";
reg = <0x10000008 0x4>;
native-endian;
- };
- reboot: syscon-reboot@10000008 {
- compatible = "syscon-reboot";
- regmap = <&periph_cntl>;
- offset = <0x0>;
- mask = <0x1>;
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x0>;
+ mask = <0x1>;
+ };
};
periph_rst: reset-controller@10000010 {
@@ -92,31 +95,88 @@
interrupts = <2>, <3>;
};
+ wdt: watchdog@1000005c {
+ compatible = "brcm,bcm7038-wdt";
+ reg = <0x1000005c 0xc>;
+
+ clocks = <&periph_osc>;
+ clock-names = "refclk";
+
+ timeout-sec = <30>;
+ };
+
leds0: led-controller@100000d0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-leds";
reg = <0x100000d0 0x8>;
+
status = "disabled";
};
uart0: serial@10000100 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000100 0x18>;
+
interrupt-parent = <&periph_intc>;
interrupts = <2>;
- clocks = <&periph_clk>;
+
+ clocks = <&periph_osc>;
clock-names = "refclk";
+
status = "disabled";
};
uart1: serial@10000120 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000120 0x18>;
+
interrupt-parent = <&periph_intc>;
interrupts = <3>;
- clocks = <&periph_clk>;
+
+ clocks = <&periph_osc>;
clock-names = "refclk";
+
+ status = "disabled";
+ };
+
+ nflash: nand@10000200 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm6368",
+ "brcm,brcmnand-v2.1",
+ "brcm,brcmnand";
+ reg = <0x10000200 0x180>,
+ <0x10000600 0x200>,
+ <0x10000070 0x10>;
+ reg-names = "nand",
+ "nand-cache",
+ "nand-int-base";
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <10>;
+
+ clocks = <&periph_clk BCM6368_CLK_NAND>;
+ clock-names = "nand";
+
+ status = "disabled";
+ };
+
+ lsspi: spi@10000800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <1>;
+
+ clocks = <&periph_clk BCM6368_CLK_SPI>;
+ clock-names = "spi";
+
+ resets = <&periph_rst BCM6368_RST_SPI>;
+ reset-names = "spi";
+
status = "disabled";
};
@@ -124,8 +184,13 @@
compatible = "brcm,bcm6368-ehci", "generic-ehci";
reg = <0x10001500 0x100>;
big-endian;
+
interrupt-parent = <&periph_intc>;
interrupts = <7>;
+
+ phys = <&usbh 0>;
+ phy-names = "usb";
+
status = "disabled";
};
@@ -134,9 +199,49 @@
reg = <0x10001600 0x100>;
big-endian;
no-big-frame-no;
+
interrupt-parent = <&periph_intc>;
interrupts = <5>;
+
+ phys = <&usbh 0>;
+ phy-names = "usb";
+
+ status = "disabled";
+ };
+
+ usbh: usb-phy@10001700 {
+ compatible = "brcm,bcm6368-usbh-phy";
+ reg = <0x10001700 0x38>;
+ #phy-cells = <1>;
+
+ clocks = <&periph_clk BCM6368_CLK_USBH>;
+ clock-names = "usbh";
+
+ resets = <&periph_rst BCM6368_RST_USBH>;
+ reset-names = "usbh";
+
status = "disabled";
};
+
+ random: rng@10004180 {
+ compatible = "brcm,bcm6368-rng";
+ reg = <0x10004180 0x14>;
+
+ clocks = <&periph_clk BCM6368_CLK_IPSEC>;
+ clock-names = "ipsec";
+
+ resets = <&periph_rst BCM6368_RST_IPSEC>;
+ reset-names = "ipsec";
+ };
+ };
+
+ pflash: nor@18000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x18000000 0x2000000>;
+ bank-width = <2>;
+
+ status = "disabled";
};
};
--
2.20.1