Patch series adds device tree bindings to support SERDES in AM64
platform.
This is split from [1] since this binding is also required for AM64
USB DT patches to be merged.
Vinod,
Once the 1st patch of the series is reviewed by Rob, can you merge and
prepare a immutable tag to be used by Nishant Menon so that he can merge
USB3 DT patches.
Changes from [1]:
*) Reverted back to adding compatible under enum.
[1] -> http://lore.kernel.org/r/[email protected]
Kishon Vijay Abraham I (3):
dt-bindings: phy: ti,phy-j721e-wiz: Add bindings for AM64 SERDES
Wrapper
dt-bindings: phy: cadence-torrent: Add binding for refclk driver
dt-bindings: ti-serdes-mux: Add defines for AM64 SoC
.../bindings/phy/phy-cadence-torrent.yaml | 20 +++++++++++++++---
.../bindings/phy/ti,phy-j721e-wiz.yaml | 4 ++++
include/dt-bindings/mux/ti-serdes.h | 5 +++++
include/dt-bindings/phy/phy-cadence-torrent.h | 2 ++
include/dt-bindings/phy/phy-ti.h | 21 +++++++++++++++++++
5 files changed, 49 insertions(+), 3 deletions(-)
create mode 100644 include/dt-bindings/phy/phy-ti.h
--
2.17.1
Add binding for refclk driver used to route the refclk out of torrent
SERDES.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../bindings/phy/phy-cadence-torrent.yaml | 20 ++++++++++++++++---
include/dt-bindings/phy/phy-cadence-torrent.h | 2 ++
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
index e266ade53d87..4608599a31d8 100644
--- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
@@ -28,13 +28,27 @@ properties:
'#size-cells':
const: 0
+ '#clock-cells':
+ const: 1
+
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
description:
- PHY reference clock. Must contain an entry in clock-names.
+ PHY reference clock for 1 item. Must contain an entry in clock-names.
+ Optional Parent to enable output reference clock.
clock-names:
- const: refclk
+ minItems: 1
+ items:
+ - const: refclk
+ - const: phy_en_refclk
+
+ assigned-clocks:
+ maxItems: 3
+
+ assigned-clock-parents:
+ maxItems: 3
reg:
minItems: 1
diff --git a/include/dt-bindings/phy/phy-cadence-torrent.h b/include/dt-bindings/phy/phy-cadence-torrent.h
index e387b6a95741..3c92c6192493 100644
--- a/include/dt-bindings/phy/phy-cadence-torrent.h
+++ b/include/dt-bindings/phy/phy-cadence-torrent.h
@@ -10,4 +10,6 @@
#define TORRENT_SERDES_EXTERNAL_SSC 1
#define TORRENT_SERDES_INTERNAL_SSC 2
+#define CDNS_TORRENT_REFCLK_DRIVER 0
+
#endif /* _DT_BINDINGS_TORRENT_SERDES_H */
--
2.17.1
Add bindings for AM64 SERDES Wrapper.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
---
.../bindings/phy/ti,phy-j721e-wiz.yaml | 4 ++++
include/dt-bindings/phy/phy-ti.h | 21 +++++++++++++++++++
2 files changed, 25 insertions(+)
create mode 100644 include/dt-bindings/phy/phy-ti.h
diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
index bbbd85501ada..57e1d013a502 100644
--- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
+++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
@@ -15,6 +15,7 @@ properties:
enum:
- ti,j721e-wiz-16g
- ti,j721e-wiz-10g
+ - ti,am64-wiz-10g
power-domains:
maxItems: 1
@@ -42,6 +43,9 @@ properties:
"#reset-cells":
const: 1
+ "#clock-cells":
+ const: 1
+
ranges: true
assigned-clocks:
diff --git a/include/dt-bindings/phy/phy-ti.h b/include/dt-bindings/phy/phy-ti.h
new file mode 100644
index 000000000000..ad955d3a56b4
--- /dev/null
+++ b/include/dt-bindings/phy/phy-ti.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides constants for TI SERDES.
+ */
+
+#ifndef _DT_BINDINGS_TI_SERDES
+#define _DT_BINDINGS_TI_SERDES
+
+/* Clock index for output clocks from WIZ */
+
+/* MUX Clocks */
+#define TI_WIZ_PLL0_REFCLK 0
+#define TI_WIZ_PLL1_REFCLK 1
+#define TI_WIZ_REFCLK_DIG 2
+
+/* Reserve index here for future additions */
+
+/* MISC Clocks */
+#define TI_WIZ_PHY_EN_REFCLK 16
+
+#endif /* _DT_BINDINGS_TI_SERDES */
--
2.17.1
AM64 has a single lane SERDES which can be configured to be used
with either PCIe or USB. Define the possilbe values for the SERDES
function in AM64 SoC here.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Acked-by: Peter Rosin <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
include/dt-bindings/mux/ti-serdes.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index 9047ec6bd3cf..d417b9268b16 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -90,4 +90,9 @@
#define J7200_SERDES0_LANE3_USB 0x2
#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
+/* AM64 */
+
+#define AM64_SERDES0_LANE0_PCIE0 0x0
+#define AM64_SERDES0_LANE0_USB 0x1
+
#endif /* _DT_BINDINGS_MUX_TI_SERDES */
--
2.17.1
On Wed, 10 Mar 2021 16:57:43 +0530, Kishon Vijay Abraham I wrote:
> Add bindings for AM64 SERDES Wrapper.
>
> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
> ---
> .../bindings/phy/ti,phy-j721e-wiz.yaml | 4 ++++
> include/dt-bindings/phy/phy-ti.h | 21 +++++++++++++++++++
> 2 files changed, 25 insertions(+)
> create mode 100644 include/dt-bindings/phy/phy-ti.h
>
Reviewed-by: Rob Herring <[email protected]>
Hi Vinod,
On 10/03/21 4:57 pm, Kishon Vijay Abraham I wrote:
> Patch series adds device tree bindings to support SERDES in AM64
> platform.
>
> This is split from [1] since this binding is also required for AM64
> USB DT patches to be merged.
>
> Vinod,
>
> Once the 1st patch of the series is reviewed by Rob, can you merge and
> prepare a immutable tag to be used by Nishant Menon so that he can merge
> USB3 DT patches.
Now that Rob has Acked the 1st patch, can you prepare an immutable tag
for Nishant Menon on this series.
AM64 SERDES driver changes [1] can also be merged after this.
Thank You
Kishon
[1] -> http://lore.kernel.org/r/[email protected]
>
> Changes from [1]:
> *) Reverted back to adding compatible under enum.
>
> [1] -> http://lore.kernel.org/r/[email protected]
>
> Kishon Vijay Abraham I (3):
> dt-bindings: phy: ti,phy-j721e-wiz: Add bindings for AM64 SERDES
> Wrapper
> dt-bindings: phy: cadence-torrent: Add binding for refclk driver
> dt-bindings: ti-serdes-mux: Add defines for AM64 SoC
>
> .../bindings/phy/phy-cadence-torrent.yaml | 20 +++++++++++++++---
> .../bindings/phy/ti,phy-j721e-wiz.yaml | 4 ++++
> include/dt-bindings/mux/ti-serdes.h | 5 +++++
> include/dt-bindings/phy/phy-cadence-torrent.h | 2 ++
> include/dt-bindings/phy/phy-ti.h | 21 +++++++++++++++++++
> 5 files changed, 49 insertions(+), 3 deletions(-)
> create mode 100644 include/dt-bindings/phy/phy-ti.h
>
On 10-03-21, 16:57, Kishon Vijay Abraham I wrote:
> Patch series adds device tree bindings to support SERDES in AM64
> platform.
>
> This is split from [1] since this binding is also required for AM64
> USB DT patches to be merged.
>
> Vinod,
>
> Once the 1st patch of the series is reviewed by Rob, can you merge and
> prepare a immutable tag to be used by Nishant Menon so that he can merge
> USB3 DT patches.
Applied and tag:
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git tags/ti-serdes-for-5.13
--
~Vinod
On 12:05-20210317, Vinod Koul wrote:
> On 10-03-21, 16:57, Kishon Vijay Abraham I wrote:
> > Patch series adds device tree bindings to support SERDES in AM64
> > platform.
> >
> > This is split from [1] since this binding is also required for AM64
> > USB DT patches to be merged.
> >
> > Vinod,
> >
> > Once the 1st patch of the series is reviewed by Rob, can you merge and
> > prepare a immutable tag to be used by Nishant Menon so that he can merge
> > USB3 DT patches.
>
> Applied and tag:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git tags/ti-serdes-for-5.13
>
Thanks Vinod. Much appreciated.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D