Multi-core SMP doesn't work on modern Intel CPUs (at least Comet Lake) without
x2apic. Unsure users should say Y.
Signed-off-by: Luke Dashjr <[email protected]>
---
arch/x86/Kconfig | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 2792879d398ee..ddb42707bd069 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -446,9 +446,10 @@ config X86_X2APIC
This enables x2apic support on CPUs that have this feature.
This allows 32-bit apic IDs (so it can support very large systems),
- and accesses the local apic via MSRs not via mmio.
+ and accesses the local apic via MSRs not via mmio. It is also needed
+ to use multiple cores on modern Intel CPUs.
- If you don't know what to do here, say N.
+ If you don't know what to do here, say Y.
config X86_MPPARSE
bool "Enable MPS table" if ACPI
--
2.6.23
On Wed, Mar 31 2021 at 05:16, Luke Dashjr wrote:
> Multi-core SMP doesn't work on modern Intel CPUs (at least Comet Lake) without
> x2apic. Unsure users should say Y.
I'd rather make it explicit by also adding
default y
Thanks,
tglx