Current dts files with "rockchip,gpio-bank" subnodes
are manually verified. In order to automate this process
the text that describes the compatible in rockchip,pinctrl.txt
is removed and converted to YAML in rockchip,gpio-bank.yaml.
Signed-off-by: Johan Jonker <[email protected]>
---
.../bindings/gpio/rockchip,gpio-bank.yaml | 82 ++++++++++++++++++++++
.../bindings/pinctrl/rockchip,pinctrl.txt | 58 +--------------
2 files changed, 83 insertions(+), 57 deletions(-)
create mode 100644 Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
new file mode 100644
index 000000000..ac2479732
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip GPIO bank
+
+maintainers:
+ - Heiko Stuebner <[email protected]>
+
+properties:
+ compatible:
+ enum:
+ - rockchip,gpio-bank
+ - rockchip,rk3188-gpio-bank0
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - gpio-controller
+ - "#gpio-cells"
+ - interrupt-controller
+ - "#interrupt-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl: pinctrl {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio0: gpio0@2000a000 {
+ compatible = "rockchip,rk3188-gpio-bank0";
+ reg = <0x2000a000 0x100>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_gates8 9>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio1: gpio1@2003c000 {
+ compatible = "rockchip,gpio-bank";
+ reg = <0x2003c000 0x100>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_gates8 10>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
index d3eae61a3..4719a6a07 100644
--- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
@@ -50,23 +50,7 @@ Deprecated properties for iomux controller:
Use rockchip,grf and rockchip,pmu described above instead.
Required properties for gpio sub nodes:
- - compatible: "rockchip,gpio-bank"
- - reg: register of the gpio bank (different than the iomux registerset)
- - interrupts: base interrupt of the gpio bank in the interrupt controller
- - clocks: clock that drives this bank
- - gpio-controller: identifies the node as a gpio controller and pin bank.
- - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
- binding is used, the amount of cells must be specified as 2. See generic
- GPIO binding documentation for description of particular cells.
- - interrupt-controller: identifies the controller node as interrupt-parent.
- - #interrupt-cells: the value of this property should be 2 and the interrupt
- cells should use the standard two-cell scheme described in
- bindings/interrupt-controller/interrupts.txt
-
-Deprecated properties for gpio sub nodes:
- - compatible: "rockchip,rk3188-gpio-bank0"
- - reg: second element: separate pull register for rk3188 bank0, use
- rockchip,pmu described above instead
+See rockchip,gpio-bank.yaml
Required properties for pin configuration node:
- rockchip,pins: 3 integers array, represents a group of pins mux and config
@@ -127,43 +111,3 @@ uart2: serial@20064000 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_xfer>;
};
-
-Example for rk3188:
-
- pinctrl@20008000 {
- compatible = "rockchip,rk3188-pinctrl";
- rockchip,grf = <&grf>;
- rockchip,pmu = <&pmu>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio0: gpio0@2000a000 {
- compatible = "rockchip,rk3188-gpio-bank0";
- reg = <0x2000a000 0x100>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_gates8 9>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio1@2003c000 {
- compatible = "rockchip,gpio-bank";
- reg = <0x2003c000 0x100>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_gates8 10>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- ...
-
- };
--
2.11.0
On Sun, Apr 11, 2021 at 07:54:35PM +0200, Johan Jonker wrote:
> Current dts files with "rockchip,gpio-bank" subnodes
> are manually verified. In order to automate this process
> the text that describes the compatible in rockchip,pinctrl.txt
> is removed and converted to YAML in rockchip,gpio-bank.yaml.
>
> Signed-off-by: Johan Jonker <[email protected]>
> ---
> .../bindings/gpio/rockchip,gpio-bank.yaml | 82 ++++++++++++++++++++++
> .../bindings/pinctrl/rockchip,pinctrl.txt | 58 +--------------
> 2 files changed, 83 insertions(+), 57 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
>
> diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> new file mode 100644
> index 000000000..ac2479732
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip GPIO bank
> +
> +maintainers:
> + - Heiko Stuebner <[email protected]>
> +
> +properties:
> + compatible:
> + enum:
> + - rockchip,gpio-bank
> + - rockchip,rk3188-gpio-bank0
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + gpio-controller: true
> +
> + "#gpio-cells":
> + const: 2
> +
> + interrupt-controller: true
> +
> + "#interrupt-cells":
> + const: 2
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - gpio-controller
> + - "#gpio-cells"
> + - interrupt-controller
> + - "#interrupt-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + pinctrl: pinctrl {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + gpio0: gpio0@2000a000 {
gpio@...
> + compatible = "rockchip,rk3188-gpio-bank0";
> + reg = <0x2000a000 0x100>;
> + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk_gates8 9>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpio1: gpio1@2003c000 {
gpio@...
> + compatible = "rockchip,gpio-bank";
> + reg = <0x2003c000 0x100>;
> + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk_gates8 10>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
> index d3eae61a3..4719a6a07 100644
> --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
> @@ -50,23 +50,7 @@ Deprecated properties for iomux controller:
> Use rockchip,grf and rockchip,pmu described above instead.
>
> Required properties for gpio sub nodes:
> - - compatible: "rockchip,gpio-bank"
> - - reg: register of the gpio bank (different than the iomux registerset)
> - - interrupts: base interrupt of the gpio bank in the interrupt controller
> - - clocks: clock that drives this bank
> - - gpio-controller: identifies the node as a gpio controller and pin bank.
> - - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
> - binding is used, the amount of cells must be specified as 2. See generic
> - GPIO binding documentation for description of particular cells.
> - - interrupt-controller: identifies the controller node as interrupt-parent.
> - - #interrupt-cells: the value of this property should be 2 and the interrupt
> - cells should use the standard two-cell scheme described in
> - bindings/interrupt-controller/interrupts.txt
> -
> -Deprecated properties for gpio sub nodes:
> - - compatible: "rockchip,rk3188-gpio-bank0"
> - - reg: second element: separate pull register for rk3188 bank0, use
> - rockchip,pmu described above instead
> +See rockchip,gpio-bank.yaml
>
> Required properties for pin configuration node:
> - rockchip,pins: 3 integers array, represents a group of pins mux and config
> @@ -127,43 +111,3 @@ uart2: serial@20064000 {
> pinctrl-names = "default";
> pinctrl-0 = <&uart2_xfer>;
> };
> -
> -Example for rk3188:
> -
> - pinctrl@20008000 {
> - compatible = "rockchip,rk3188-pinctrl";
> - rockchip,grf = <&grf>;
> - rockchip,pmu = <&pmu>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges;
> -
> - gpio0: gpio0@2000a000 {
> - compatible = "rockchip,rk3188-gpio-bank0";
> - reg = <0x2000a000 0x100>;
> - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk_gates8 9>;
> -
> - gpio-controller;
> - #gpio-cells = <2>;
> -
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - };
> -
> - gpio1: gpio1@2003c000 {
> - compatible = "rockchip,gpio-bank";
> - reg = <0x2003c000 0x100>;
> - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clk_gates8 10>;
> -
> - gpio-controller;
> - #gpio-cells = <2>;
> -
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - };
> -
> - ...
> -
> - };
> --
> 2.11.0
>