The Chrome Embedded Controller (EC) generates a hard reset type C event
when a USB Power Delivery (PD) hard reset is encountered. Handle this
event by unregistering the partner and cable on the associated port and
clearing the event flag.
Also update the EC command header to include the new event bit. This bit
is included in the latest version of the Chrome EC headers[1].
[1] https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/include/ec_commands.h
Cc: Benson Leung <[email protected]>
Signed-off-by: Prashant Malani <[email protected]>
---
drivers/platform/chrome/cros_ec_typec.c | 13 +++++++++++++
include/linux/platform_data/cros_ec_commands.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
index d3df1717a5fd..22052f569f2a 100644
--- a/drivers/platform/chrome/cros_ec_typec.c
+++ b/drivers/platform/chrome/cros_ec_typec.c
@@ -905,6 +905,19 @@ static void cros_typec_handle_status(struct cros_typec_data *typec, int port_num
return;
}
+ /* If we got a hard reset, unregister everything and return. */
+ if (resp.events & PD_STATUS_EVENT_HARD_RESET) {
+ cros_typec_remove_partner(typec, port_num);
+ cros_typec_remove_cable(typec, port_num);
+
+ ret = cros_typec_send_clear_event(typec, port_num,
+ PD_STATUS_EVENT_HARD_RESET);
+ if (ret < 0)
+ dev_warn(typec->dev,
+ "Failed hard reset event clear, port: %d\n", port_num);
+ return;
+ }
+
/* Handle any events appropriately. */
if (resp.events & PD_STATUS_EVENT_SOP_DISC_DONE && !typec->ports[port_num]->sop_disc_done) {
u16 sop_revision;
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
index 5ff8597ceabd..9156078c6fc6 100644
--- a/include/linux/platform_data/cros_ec_commands.h
+++ b/include/linux/platform_data/cros_ec_commands.h
@@ -5678,6 +5678,7 @@ enum tcpc_cc_polarity {
#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
+#define PD_STATUS_EVENT_HARD_RESET BIT(2)
struct ec_params_typec_status {
uint8_t port;
--
2.31.1.295.g9ea45b61b8-goog
Hi Prashant,
Thank you for your patch.
Missatge de Prashant Malani <[email protected]> del dia dj., 15
d’abr. 2021 a les 4:15:
>
> The Chrome Embedded Controller (EC) generates a hard reset type C event
> when a USB Power Delivery (PD) hard reset is encountered. Handle this
> event by unregistering the partner and cable on the associated port and
> clearing the event flag.
>
> Also update the EC command header to include the new event bit. This bit
> is included in the latest version of the Chrome EC headers[1].
>
> [1] https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/include/ec_commands.h
>
> Cc: Benson Leung <[email protected]>
> Signed-off-by: Prashant Malani <[email protected]>
> ---
> drivers/platform/chrome/cros_ec_typec.c | 13 +++++++++++++
> include/linux/platform_data/cros_ec_commands.h | 1 +
Could this be a separate patch?
Thank you.
Enric
> 2 files changed, 14 insertions(+)
>
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
> index d3df1717a5fd..22052f569f2a 100644
> --- a/drivers/platform/chrome/cros_ec_typec.c
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -905,6 +905,19 @@ static void cros_typec_handle_status(struct cros_typec_data *typec, int port_num
> return;
> }
>
> + /* If we got a hard reset, unregister everything and return. */
> + if (resp.events & PD_STATUS_EVENT_HARD_RESET) {
> + cros_typec_remove_partner(typec, port_num);
> + cros_typec_remove_cable(typec, port_num);
> +
> + ret = cros_typec_send_clear_event(typec, port_num,
> + PD_STATUS_EVENT_HARD_RESET);
> + if (ret < 0)
> + dev_warn(typec->dev,
> + "Failed hard reset event clear, port: %d\n", port_num);
> + return;
> + }
> +
> /* Handle any events appropriately. */
> if (resp.events & PD_STATUS_EVENT_SOP_DISC_DONE && !typec->ports[port_num]->sop_disc_done) {
> u16 sop_revision;
> diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
> index 5ff8597ceabd..9156078c6fc6 100644
> --- a/include/linux/platform_data/cros_ec_commands.h
> +++ b/include/linux/platform_data/cros_ec_commands.h
> @@ -5678,6 +5678,7 @@ enum tcpc_cc_polarity {
>
> #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
> #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
> +#define PD_STATUS_EVENT_HARD_RESET BIT(2)
>
> struct ec_params_typec_status {
> uint8_t port;
> --
> 2.31.1.295.g9ea45b61b8-goog
>
Hi Enric,
Thanks for taking a look.
On Thu, Apr 15, 2021 at 10:39 PM Enric Balletbo Serra
<[email protected]> wrote:
>
> Hi Prashant,
>
> Thank you for your patch.
>
> Missatge de Prashant Malani <[email protected]> del dia dj., 15
> d’abr. 2021 a les 4:15:
> >
> > The Chrome Embedded Controller (EC) generates a hard reset type C event
> > when a USB Power Delivery (PD) hard reset is encountered. Handle this
> > event by unregistering the partner and cable on the associated port and
> > clearing the event flag.
> >
> > Also update the EC command header to include the new event bit. This bit
> > is included in the latest version of the Chrome EC headers[1].
> >
> > [1] https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/include/ec_commands.h
> >
> > Cc: Benson Leung <[email protected]>
> > Signed-off-by: Prashant Malani <[email protected]>
> > ---
> > drivers/platform/chrome/cros_ec_typec.c | 13 +++++++++++++
> > include/linux/platform_data/cros_ec_commands.h | 1 +
>
> Could this be a separate patch?
Sure. I'll send a v2 with them split up.