2021-05-14 02:12:16

by Tobias Schramm

[permalink] [raw]
Subject: [PATCH v2 0/7] Add missing peripherals to Allwinner V3s/V3 device trees

The Allwinner V3s/V3 SoCs feature quite a few peripherals that have good
driver support but yet are nowhere to be found in the SoCs dts.
This patchset adds the DMA controller, the relevant DMA properties for all
peripherals supporting DMA, the integrated analog codec and - for the
Allwinner V3 SoC - also the I2S interface.
I've included all of those changes in one patchset since they do all
depend on addition of the DMA controller.
All changes have been tested in a recent project of mine using a Sochip S3
(a rebranded Allwinner V3) and are confirmed working.

This is v2 of this patchset.

Cheers,
Tobias

Changelog:
v2:
- add v3/v3s specific compatible strings
- fix v3s audio codec analog frontend compatible
- fix an I2S -> I2C typo

Tobias Schramm (7):
ARM: dts: sun8i: v3s: add DMA controller to v3s dts
ARM: dts: sun8i: v3s: add DMA properties to peripherals supporting DMA
ARM: dts: sun8i: v3s: add analog codec and frontend to v3s dts
ASoC: dt-bindings: sun8i-a23-codec-analog: add compatible for
Allwinner V3
ARM: dts: sun8i: V3: add codec analog frontend to V3 dts
dt-bindings: sound: sun4i-i2s: add Allwinner V3 I2S compatible
ARM: dts: sun8i: V3: add I2S interface to V3 dts

.../sound/allwinner,sun4i-a10-i2s.yaml | 3 ++
.../allwinner,sun8i-a23-codec-analog.yaml | 9 +++--
arch/arm/boot/dts/sun8i-v3.dtsi | 31 +++++++++++++++
arch/arm/boot/dts/sun8i-v3s.dtsi | 39 +++++++++++++++++++
4 files changed, 79 insertions(+), 3 deletions(-)

--
2.31.1



2021-05-14 02:12:27

by Tobias Schramm

[permalink] [raw]
Subject: [PATCH v2 3/7] ARM: dts: sun8i: v3s: add analog codec and frontend to v3s dts

The Allwinner V3s and V3 SoCs feature an integrated analog audio codec.
Additionally both have an analog frontend with mixers and amplifiers for
the codec.
This commit adds both, the analog codec and its frontend to the V3s dtsi.

Signed-off-by: Tobias Schramm <[email protected]>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 3eaa8703e2ac..236cf45bba91 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -441,6 +441,25 @@ lradc: lradc@1c22800 {
status = "disabled";
};

+ codec: codec@1c22c00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-v3s-codec";
+ reg = <0x01c22c00 0x400>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_BUS_CODEC>;
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ allwinner,codec-analog-controls = <&codec_analog>;
+ status = "disabled";
+ };
+
+ codec_analog: codec-analog@1c23000 {
+ compatible = "allwinner,sun8i-v3s-codec-analog";
+ reg = <0x01c23000 0x4>;
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.31.1


2021-05-14 02:12:42

by Tobias Schramm

[permalink] [raw]
Subject: [PATCH v2 1/7] ARM: dts: sun8i: v3s: add DMA controller to v3s dts

The Allwinner V3s and V3 feature a DMA controller.
This commit adds it to the V3s dtsi.

Signed-off-by: Tobias Schramm <[email protected]>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index eb4cb63fef13..f0296ab46137 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2016 Icenowy Zheng <[email protected]>
+ * Copyright (C) 2021 Tobias Schramm <[email protected]>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@@ -172,6 +173,15 @@ nmi_intc: interrupt-controller@1c000d0 {
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};

+ dma: dma-controller@1c02000 {
+ compatible = "allwinner,sun8i-v3s-dma";
+ reg = <0x01c02000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_DMA>;
+ resets = <&ccu RST_BUS_DMA>;
+ #dma-cells = <1>;
+ };
+
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-v3s-tcon";
reg = <0x01c0c000 0x1000>;
--
2.31.1


2021-05-14 02:12:51

by Tobias Schramm

[permalink] [raw]
Subject: [PATCH v2 2/7] ARM: dts: sun8i: v3s: add DMA properties to peripherals supporting DMA

This commit adds DMA properties to all peripherals supporting DMA on the
Allwinner V3s, enabling accelerated data transfer to them.

Signed-off-by: Tobias Schramm <[email protected]>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index f0296ab46137..3eaa8703e2ac 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -285,6 +285,8 @@ crypto@1c15000 {
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
clock-names = "ahb", "mod";
+ dmas = <&dma 16>, <&dma 16>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_CE>;
reset-names = "ahb";
};
@@ -446,6 +448,8 @@ uart0: serial@1c28000 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
+ dmas = <&dma 6>, <&dma 6>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
@@ -457,6 +461,8 @@ uart1: serial@1c28400 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
+ dmas = <&dma 7>, <&dma 7>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART1>;
status = "disabled";
};
@@ -468,6 +474,8 @@ uart2: serial@1c28800 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
+ dmas = <&dma 8>, <&dma 8>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART2>;
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
@@ -547,6 +555,8 @@ spi0: spi@1c68000 {
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
+ dmas = <&dma 23>, <&dma 23>;
+ dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
resets = <&ccu RST_BUS_SPI0>;
--
2.31.1


2021-05-14 02:14:28

by Tobias Schramm

[permalink] [raw]
Subject: [PATCH v2 7/7] ARM: dts: sun8i: V3: add I2S interface to V3 dts

The Allwinner V3 SoC features an I2S interface. The I2S peripheral is
identical to that in the Allwinner H3 SoC.
This commit adds it to the Allwinner V3 dts.

Signed-off-by: Tobias Schramm <[email protected]>
---
arch/arm/boot/dts/sun8i-v3.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi
index 8af790d286b9..3698e024d604 100644
--- a/arch/arm/boot/dts/sun8i-v3.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3.dtsi
@@ -1,10 +1,31 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019 Icenowy Zheng <[email protected]>
+ * Copyright (C) 2021 Tobias Schramm <[email protected]>
*/

#include "sun8i-v3s.dtsi"

+/ {
+ soc {
+ i2s0: i2s@1c22000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-v3-i2s",
+ "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22000 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 3>, <&dma 3>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_pins>;
+ resets = <&ccu RST_BUS_I2S0>;
+ status = "disabled";
+ };
+ };
+};
+
&ccu {
compatible = "allwinner,sun8i-v3-ccu";
};
@@ -30,6 +51,11 @@ external_mdio: mdio@2 {
&pio {
compatible = "allwinner,sun8i-v3-pinctrl";

+ i2s0_pins: i2s0-pins {
+ pins = "PG10", "PG11", "PG12", "PG13";
+ function = "i2s";
+ };
+
uart1_pg_pins: uart1-pg-pins {
pins = "PG6", "PG7";
function = "uart1";
--
2.31.1


2021-05-14 08:35:50

by Tobias Schramm

[permalink] [raw]
Subject: [PATCH v2 4/7] ASoC: dt-bindings: sun8i-a23-codec-analog: add compatible for Allwinner V3

The analog codec frontend of the Allwinner V3 is compatible with the
analog codec frontend used on the Allwinner H3.
This patch adds a compatible string for the analog codec frontend on the
Allwinner V3 SoC.

Signed-off-by: Tobias Schramm <[email protected]>
---
.../bindings/sound/allwinner,sun8i-a23-codec-analog.yaml | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml
index 9718358826ab..69a21e3220fe 100644
--- a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml
+++ b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml
@@ -12,12 +12,15 @@ maintainers:

properties:
compatible:
- enum:
+ oneOf:
# FIXME: This is documented in the PRCM binding, but needs to be
# migrated here at some point
# - allwinner,sun8i-a23-codec-analog
- - allwinner,sun8i-h3-codec-analog
- - allwinner,sun8i-v3s-codec-analog
+ - const: allwinner,sun8i-h3-codec-analog
+ - items:
+ - const: allwinner,sun8i-v3-codec-analog
+ - const: allwinner,sun8i-h3-codec-analog
+ - const: allwinner,sun8i-v3s-codec-analog

reg:
maxItems: 1
--
2.31.1


2021-05-14 08:36:00

by Tobias Schramm

[permalink] [raw]
Subject: [PATCH v2 6/7] dt-bindings: sound: sun4i-i2s: add Allwinner V3 I2S compatible

The I2S peripheral of the Allwinner V3 SoC is compatible with the one
found in the Allwinner H3 SoC.
This patch adds a compatible string for it.

Signed-off-by: Tobias Schramm <[email protected]>
---
.../devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml | 3 +++
1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml
index a16e37b01e1d..39b66e9ce3e3 100644
--- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml
+++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml
@@ -20,6 +20,9 @@ properties:
- const: allwinner,sun6i-a31-i2s
- const: allwinner,sun8i-a83t-i2s
- const: allwinner,sun8i-h3-i2s
+ - items:
+ - const: allwinner,sun8i-v3-i2s
+ - const: allwinner,sun8i-h3-i2s
- const: allwinner,sun50i-a64-codec-i2s
- items:
- const: allwinner,sun50i-a64-i2s
--
2.31.1


2021-05-14 08:36:08

by Tobias Schramm

[permalink] [raw]
Subject: [PATCH v2 5/7] ARM: dts: sun8i: V3: add codec analog frontend to V3 dts

The Allwinner V3 SoC has a different analog codec frontend than the V3s
SoC. The frontend used on the V3 SoC is compatible with the on used in
the Allwinner H3 SoC.
This patch adds the corresponding node to the Allwinner V3 dtsi.

Signed-off-by: Tobias Schramm <[email protected]>
---
arch/arm/boot/dts/sun8i-v3.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi
index c279e13583ba..8af790d286b9 100644
--- a/arch/arm/boot/dts/sun8i-v3.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3.dtsi
@@ -9,6 +9,11 @@ &ccu {
compatible = "allwinner,sun8i-v3-ccu";
};

+&codec_analog {
+ compatible = "allwinner,sun8i-v3-codec-analog",
+ "allwinner,sun8i-h3-codec-analog";
+};
+
&emac {
/delete-property/ phy-handle;
/delete-property/ phy-mode;
--
2.31.1


2021-05-14 14:10:38

by Andre Przywara

[permalink] [raw]
Subject: Re: [PATCH v2 1/7] ARM: dts: sun8i: v3s: add DMA controller to v3s dts

On Fri, 14 May 2021 01:30:18 +0200
Tobias Schramm <[email protected]> wrote:

> The Allwinner V3s and V3 feature a DMA controller.
> This commit adds it to the V3s dtsi.
>
> Signed-off-by: Tobias Schramm <[email protected]>

Address, interrupt and clocks/reset match the manual.

Reviewed-by: Andre Przywara <[email protected]>

Cheers,
Andre

> ---
> arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
> index eb4cb63fef13..f0296ab46137 100644
> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
> @@ -1,5 +1,6 @@
> /*
> * Copyright (C) 2016 Icenowy Zheng <[email protected]>
> + * Copyright (C) 2021 Tobias Schramm <[email protected]>
> *
> * This file is dual-licensed: you can use it either under the terms
> * of the GPL or the X11 license, at your option. Note that this dual
> @@ -172,6 +173,15 @@ nmi_intc: interrupt-controller@1c000d0 {
> interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + dma: dma-controller@1c02000 {
> + compatible = "allwinner,sun8i-v3s-dma";
> + reg = <0x01c02000 0x1000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_DMA>;
> + resets = <&ccu RST_BUS_DMA>;
> + #dma-cells = <1>;
> + };
> +
> tcon0: lcd-controller@1c0c000 {
> compatible = "allwinner,sun8i-v3s-tcon";
> reg = <0x01c0c000 0x1000>;


2021-05-14 14:34:11

by Andre Przywara

[permalink] [raw]
Subject: Re: [PATCH v2 2/7] ARM: dts: sun8i: v3s: add DMA properties to peripherals supporting DMA

On Fri, 14 May 2021 01:30:19 +0200
Tobias Schramm <[email protected]> wrote:

> This commit adds DMA properties to all peripherals supporting DMA on the
> Allwinner V3s, enabling accelerated data transfer to them.
>
> Signed-off-by: Tobias Schramm <[email protected]>

DMA channels match the manual.

Reviewed-by: Andre Przywara <[email protected]>

Cheers,
Andre

> ---
> arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
> index f0296ab46137..3eaa8703e2ac 100644
> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
> @@ -285,6 +285,8 @@ crypto@1c15000 {
> interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
> clock-names = "ahb", "mod";
> + dmas = <&dma 16>, <&dma 16>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_CE>;
> reset-names = "ahb";
> };
> @@ -446,6 +448,8 @@ uart0: serial@1c28000 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART0>;
> + dmas = <&dma 6>, <&dma 6>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_UART0>;
> status = "disabled";
> };
> @@ -457,6 +461,8 @@ uart1: serial@1c28400 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART1>;
> + dmas = <&dma 7>, <&dma 7>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_UART1>;
> status = "disabled";
> };
> @@ -468,6 +474,8 @@ uart2: serial@1c28800 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART2>;
> + dmas = <&dma 8>, <&dma 8>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_UART2>;
> pinctrl-0 = <&uart2_pins>;
> pinctrl-names = "default";
> @@ -547,6 +555,8 @@ spi0: spi@1c68000 {
> interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
> clock-names = "ahb", "mod";
> + dmas = <&dma 23>, <&dma 23>;
> + dma-names = "rx", "tx";
> pinctrl-names = "default";
> pinctrl-0 = <&spi0_pins>;
> resets = <&ccu RST_BUS_SPI0>;


2021-05-14 18:34:51

by Rob Herring

[permalink] [raw]
Subject: Re: [PATCH v2 4/7] ASoC: dt-bindings: sun8i-a23-codec-analog: add compatible for Allwinner V3

On Fri, 14 May 2021 01:30:21 +0200, Tobias Schramm wrote:
> The analog codec frontend of the Allwinner V3 is compatible with the
> analog codec frontend used on the Allwinner H3.
> This patch adds a compatible string for the analog codec frontend on the
> Allwinner V3 SoC.
>
> Signed-off-by: Tobias Schramm <[email protected]>
> ---
> .../bindings/sound/allwinner,sun8i-a23-codec-analog.yaml | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:
./Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml:21:9: [warning] wrong indentation: expected 10 but found 8 (indentation)

dtschema/dtc warnings/errors:

See https://patchwork.ozlabs.org/patch/1478254

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.