AM64 has one PCIe instance which can be configured in either
host mode (RC) or device mode (EP). Add PCIe DT node for host
mode and device mode here.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 46 ++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index a67f10406a8e..9c77f7da5d28 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -728,4 +728,50 @@
#clock-cells = <1>;
};
};
+
+ pcie0_rc: pcie@f102000 {
+ compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
+ reg = <0x00 0x0f102000 0x00 0x1000>,
+ <0x00 0x0f100000 0x00 0x400>,
+ <0x00 0x0d000000 0x00 0x00800000>,
+ <0x00 0x68000000 0x00 0x00001000>;
+ reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
+ interrupt-names = "link_state";
+ interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
+ device_type = "pci";
+ ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
+ max-link-speed = <2>;
+ num-lanes = <1>;
+ power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 114 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>;
+ clock-names = "fck", "pcie_refclk";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0xff>;
+ cdns,no-bar-match-nbits = <64>;
+ vendor-id = <0x104c>;
+ device-id = <0xb010>;
+ msi-map = <0x0 &gic_its 0x0 0x10000>;
+ ranges = <0x01000000 0x00 0x68001000 0x00 0x68001000 0x00 0x0010000>,
+ <0x02000000 0x00 0x68011000 0x00 0x68011000 0x00 0x7fef000>;
+ dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
+ };
+
+ pcie0_ep: pcie-ep@f102000 {
+ compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
+ reg = <0x00 0x0f102000 0x00 0x1000>,
+ <0x00 0x0f100000 0x00 0x400>,
+ <0x00 0x0d000000 0x00 0x00800000>,
+ <0x00 0x68000000 0x00 0x08000000>;
+ reg-names = "intd_cfg", "user_cfg", "reg", "mem";
+ interrupt-names = "link_state";
+ interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
+ ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
+ max-link-speed = <2>;
+ num-lanes = <1>;
+ power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 114 0>;
+ clock-names = "fck";
+ max-functions = /bits/ 8 <1>;
+ };
};
--
2.17.1
On 19:59-20210526, Kishon Vijay Abraham I wrote:
> AM64 has one PCIe instance which can be configured in either
> host mode (RC) or device mode (EP). Add PCIe DT node for host
> mode and device mode here.
>
> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 46 ++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index a67f10406a8e..9c77f7da5d28 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -728,4 +728,50 @@
> #clock-cells = <1>;
> };
> };
> +
> + pcie0_rc: pcie@f102000 {
> + compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
> + reg = <0x00 0x0f102000 0x00 0x1000>,
> + <0x00 0x0f100000 0x00 0x400>,
> + <0x00 0x0d000000 0x00 0x00800000>,
> + <0x00 0x68000000 0x00 0x00001000>;
> + reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
[...]
> +
> + pcie0_ep: pcie-ep@f102000 {
Hmm...
Warning (unique_unit_address): /bus@f4000/pcie@f102000: duplicate unit-address (also used in node /bus@f4000/pcie-ep@f102000)
we could pick reg for pcie-ep for node address, instead of intd_cfg address?
OR, does that mess something else up?
> + compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
> + reg = <0x00 0x0f102000 0x00 0x1000>,
> + <0x00 0x0f100000 0x00 0x400>,
> + <0x00 0x0d000000 0x00 0x00800000>,
> + <0x00 0x68000000 0x00 0x08000000>;
[...]
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Hi Nishanth,
On 27/05/21 12:21 am, Nishanth Menon wrote:
> On 19:59-20210526, Kishon Vijay Abraham I wrote:
>> AM64 has one PCIe instance which can be configured in either
>> host mode (RC) or device mode (EP). Add PCIe DT node for host
>> mode and device mode here.
>>
>> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
>> ---
>> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 46 ++++++++++++++++++++++++
>> 1 file changed, 46 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> index a67f10406a8e..9c77f7da5d28 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> @@ -728,4 +728,50 @@
>> #clock-cells = <1>;
>> };
>> };
>> +
>> + pcie0_rc: pcie@f102000 {
>> + compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
>> + reg = <0x00 0x0f102000 0x00 0x1000>,
>> + <0x00 0x0f100000 0x00 0x400>,
>> + <0x00 0x0d000000 0x00 0x00800000>,
>> + <0x00 0x68000000 0x00 0x00001000>;
>> + reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
> [...]
>> +
>> + pcie0_ep: pcie-ep@f102000 {
> Hmm...
> Warning (unique_unit_address): /bus@f4000/pcie@f102000: duplicate unit-address (also used in node /bus@f4000/pcie-ep@f102000)
> we could pick reg for pcie-ep for node address, instead of intd_cfg address?
>
> OR, does that mess something else up?
yeah, that actually require changes in the binding to fix it properly,
since only the first entry in reg should be given for unit address.
Thanks
Kishon
>
>> + compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
>> + reg = <0x00 0x0f102000 0x00 0x1000>,
>> + <0x00 0x0f100000 0x00 0x400>,
>> + <0x00 0x0d000000 0x00 0x00800000>,
>> + <0x00 0x68000000 0x00 0x08000000>;
>
> [...]
>