Add SPM register data sequence for MSM8226 SoC and enable SAW2 power
controller for it.
Changes in v2:
- Removed APQ8026 SoC support
Bartosz Dudziak (2):
dt-bindings: arm: msm: Add SAW2 for MSM8226
cpuidle: qcom: Add SPM register data for MSM8226
.../devicetree/bindings/arm/msm/qcom,saw2.txt | 1 +
drivers/cpuidle/cpuidle-qcom-spm.c | 14 ++++++++++++++
2 files changed, 15 insertions(+)
--
2.25.1
Add the dt-binding compatible in the SPM AVS Wrapper 2 (SAW2) for the
MSM8226 SoC platform.
Signed-off-by: Bartosz Dudziak <[email protected]>
---
Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
index ae4afc6dcf..94d50a949b 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt
@@ -25,6 +25,7 @@ PROPERTIES
"qcom,saw2"
A more specific value could be one of:
"qcom,apq8064-saw2-v1.1-cpu"
+ "qcom,msm8226-saw2-v2.1-cpu"
"qcom,msm8974-saw2-v2.1-cpu"
"qcom,apq8084-saw2-v2.1-cpu"
--
2.25.1
Add MSM8226 register data to SPM AVS Wrapper 2 (SAW2) power controller
driver.
Signed-off-by: Bartosz Dudziak <[email protected]>
---
drivers/cpuidle/cpuidle-qcom-spm.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c
index adf91a6e4d..c0e7971da2 100644
--- a/drivers/cpuidle/cpuidle-qcom-spm.c
+++ b/drivers/cpuidle/cpuidle-qcom-spm.c
@@ -87,6 +87,18 @@ static const struct spm_reg_data spm_reg_8974_8084_cpu = {
.start_index[PM_SLEEP_MODE_SPC] = 3,
};
+/* SPM register data for 8226 */
+static const struct spm_reg_data spm_reg_8226_cpu = {
+ .reg_offset = spm_reg_offset_v2_1,
+ .spm_cfg = 0x0,
+ .spm_dly = 0x3C102800,
+ .seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,
+ 0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B,
+ 0x80, 0x10, 0x26, 0x30, 0x0F },
+ .start_index[PM_SLEEP_MODE_STBY] = 0,
+ .start_index[PM_SLEEP_MODE_SPC] = 5,
+};
+
static const u8 spm_reg_offset_v1_1[SPM_REG_NR] = {
[SPM_REG_CFG] = 0x08,
[SPM_REG_SPM_CTL] = 0x20,
@@ -259,6 +271,8 @@ static struct spm_driver_data *spm_get_drv(struct platform_device *pdev,
}
static const struct of_device_id spm_match_table[] = {
+ { .compatible = "qcom,msm8226-saw2-v2.1-cpu",
+ .data = &spm_reg_8226_cpu },
{ .compatible = "qcom,msm8974-saw2-v2.1-cpu",
.data = &spm_reg_8974_8084_cpu },
{ .compatible = "qcom,apq8084-saw2-v2.1-cpu",
--
2.25.1
On Sun, May 30, 2021 at 02:18:03PM +0200, Bartosz Dudziak wrote:
> Add MSM8226 register data to SPM AVS Wrapper 2 (SAW2) power controller
> driver.
>
> Signed-off-by: Bartosz Dudziak <[email protected]>
I checked that the values added here match the ones I see in
msm8226-pm-v2.dtsi in the downstream kernel, so FWIW:
Reviewed-by: Stephan Gerhold <[email protected]>
Thanks,
Stephan
> ---
> drivers/cpuidle/cpuidle-qcom-spm.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c
> index adf91a6e4d..c0e7971da2 100644
> --- a/drivers/cpuidle/cpuidle-qcom-spm.c
> +++ b/drivers/cpuidle/cpuidle-qcom-spm.c
> @@ -87,6 +87,18 @@ static const struct spm_reg_data spm_reg_8974_8084_cpu = {
> .start_index[PM_SLEEP_MODE_SPC] = 3,
> };
>
> +/* SPM register data for 8226 */
> +static const struct spm_reg_data spm_reg_8226_cpu = {
> + .reg_offset = spm_reg_offset_v2_1,
> + .spm_cfg = 0x0,
> + .spm_dly = 0x3C102800,
> + .seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,
> + 0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B,
> + 0x80, 0x10, 0x26, 0x30, 0x0F },
> + .start_index[PM_SLEEP_MODE_STBY] = 0,
> + .start_index[PM_SLEEP_MODE_SPC] = 5,
> +};
> +
> static const u8 spm_reg_offset_v1_1[SPM_REG_NR] = {
> [SPM_REG_CFG] = 0x08,
> [SPM_REG_SPM_CTL] = 0x20,
> @@ -259,6 +271,8 @@ static struct spm_driver_data *spm_get_drv(struct platform_device *pdev,
> }
>
> static const struct of_device_id spm_match_table[] = {
> + { .compatible = "qcom,msm8226-saw2-v2.1-cpu",
> + .data = &spm_reg_8226_cpu },
> { .compatible = "qcom,msm8974-saw2-v2.1-cpu",
> .data = &spm_reg_8974_8084_cpu },
> { .compatible = "qcom,apq8084-saw2-v2.1-cpu",
> --
> 2.25.1
>
On Sun, 30 May 2021 14:18:02 +0200, Bartosz Dudziak wrote:
> Add the dt-binding compatible in the SPM AVS Wrapper 2 (SAW2) for the
> MSM8226 SoC platform.
>
> Signed-off-by: Bartosz Dudziak <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <[email protected]>
Hi,
On Sun, May 30, 2021 at 02:18:01PM +0200, Bartosz Dudziak wrote:
> Add SPM register data sequence for MSM8226 SoC and enable SAW2 power
> controller for it.
>
> Changes in v2:
> - Removed APQ8026 SoC support
>
> Bartosz Dudziak (2):
> dt-bindings: arm: msm: Add SAW2 for MSM8226
> cpuidle: qcom: Add SPM register data for MSM8226
>
> .../devicetree/bindings/arm/msm/qcom,saw2.txt | 1 +
> drivers/cpuidle/cpuidle-qcom-spm.c | 14 ++++++++++++++
> 2 files changed, 15 insertions(+)
>
>
It looks like you got the To:/Cc: list wrong in v2 (was okay in v1).
Can you re-send these patches and include Daniel Lezcano (ARM cpuidle
maintainer) and the linux-pm mailing list? Otherwise they might never
be applied by anyone. :)
Please also make sure to add the Acked-by:/Reviewed-by: from myself/Rob
to the respective patches when re-sending.
Thanks!
Stephan