2021-06-16 06:06:07

by Bin Meng

Subject: [PATCH 1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes

From: Bin Meng <[email protected]>

The "clock-frequency" property of cpu nodes isn't required. Drop it.

Signed-off-by: Bin Meng <[email protected]>
---

arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 5 -----
1 file changed, 5 deletions(-)

diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
index b9819570a7d1..ee54878b3f89 100644
--- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
@@ -17,7 +17,6 @@ cpus {
#size-cells = <0>;

cpu@0 {
- clock-frequency = <0>;
compatible = "sifive,e51", "sifive,rocket0", "riscv";
device_type = "cpu";
i-cache-block-size = <64>;
@@ -35,7 +34,6 @@ cpu0_intc: interrupt-controller {
};

cpu@1 {
- clock-frequency = <0>;
compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
@@ -62,7 +60,6 @@ cpu1_intc: interrupt-controller {
};

cpu@2 {
- clock-frequency = <0>;
compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
@@ -89,7 +86,6 @@ cpu2_intc: interrupt-controller {
};

cpu@3 {
- clock-frequency = <0>;
compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
@@ -116,7 +112,6 @@ cpu3_intc: interrupt-controller {
};

cpu@4 {
- clock-frequency = <0>;
compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
d-cache-block-size = <64>;
d-cache-sets = <64>;
--
2.25.1

2021-06-16 06:06:10

by Bin Meng

Subject: [PATCH 2/2] riscv: dts: microchip: Fix wrong interrupt numbers of DMA

From: Bin Meng <[email protected]>

Per chapter 5.2.2, interrupt sources in the PolarFire MSS doc [1],
the correct interrupt numbers for DMA are <5,6,...,12>.

[1] https://www.microsemi.com/document-portal/doc_download/
1245725-polarfire-soc-fpga-mss-technical-reference-manual

Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
Signed-off-by: Bin Meng <[email protected]>
---

arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
index ee54878b3f89..a00d9dc560d3 100644
--- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
@@ -182,7 +182,7 @@ dma@3000000 {
compatible = "sifive,fu540-c000-pdma";
reg = <0x0 0x3000000 0x0 0x8000>;
interrupt-parent = <&plic>;
- interrupts = <23 24 25 26 27 28 29 30>;
+ interrupts = <5 6 7 8 9 10 11 12>;
#dma-cells = <1>;
};

--
2.25.1

2021-07-08 13:40:48

by Bin Meng

Subject: Re: [PATCH 1/2] riscv: dts: microchip: Drop "clock-frequency" property of cpu nodes

On Wed, Jun 16, 2021 at 2:02 PM Bin Meng <[email protected]> wrote:
>
> From: Bin Meng <[email protected]>
>
> The "clock-frequency" property of cpu nodes isn't required. Drop it.
>
> Signed-off-by: Bin Meng <[email protected]>
> ---
>
> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 5 -----
> 1 file changed, 5 deletions(-)
>

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