Add device tree bindings for the ADRF6780 Upconverter.
Signed-off-by: Antoniu Miclaus <[email protected]>
---
.../bindings/iio/frequency/adi,adrf6780.yaml | 133 ++++++++++++++++++
1 file changed, 133 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml
diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml
new file mode 100644
index 000000000000..008f76095a63
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml
@@ -0,0 +1,133 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/frequency/adi,adrf6780.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ADRF6780 Microwave Upconverter
+
+maintainers:
+- Antoniu Miclaus <[email protected]>
+
+description: |
+ wideband, microwave upconverter optimized for point to point microwave
+ radio designs operating in the 5.9 GHz to 23.6 GHz frequency range.
+ https://www.analog.com/en/products/adrf6780.html
+
+properties:
+ compatible:
+ enum:
+ - adi,adrf6780
+
+ reg:
+ maxItems: 1
+
+ spi-max-frequency:
+ maximum: 1000000
+
+ clocks:
+ description:
+ Definition of the external clock (see clock/clock-bindings.txt)
+ minItems: 1
+
+ clock-names:
+ description:
+ Must be "lo_in"
+ maxItems: 1
+
+ clock-output-names:
+ maxItems: 1
+
+ adi,parity-en:
+ description:
+ Enable Parity for Write execution.
+ type: boolean
+
+ adi,vga-buff-en:
+ description:
+ VGA Buffer Enable.
+ type: boolean
+
+ adi,det-en:
+ description:
+ Detector Enable.
+ type: boolean
+
+ adi,lo-buff-en:
+ description:
+ LO Buffer Enable.
+ type: boolean
+
+ adi,if-mode-en:
+ description:
+ IF Mode Enable.
+ type: boolean
+
+ adi,iq-mode-en:
+ description:
+ IQ Mode Enable.
+ type: boolean
+
+ adi,lo-x2-en:
+ description:
+ LO x2 Enable.
+ type: boolean
+
+ adi,lo-ppf-en:
+ description:
+ LO x1 Enable.
+ type: boolean
+
+ adi,lo-en:
+ description:
+ LO Enable.
+ type: boolean
+
+ adi,uc-bias-en:
+ description:
+ UC Bias Enable.
+ type: boolean
+
+ adi,lo-sideband:
+ description:
+ Switch to the Other LO Sideband.
+ type: boolean
+
+ adi,vdet-out-en:
+ description:
+ VDET Output Select Enable.
+ type: boolean
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ '#clock-cells':
+ const: 0
+
+required:
+- compatible
+- reg
+- clocks
+- clock-names
+
+additionalProperties: false
+
+examples:
+- |
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ adrf6780@0{
+ compatible = "adi,adrf6780";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ clocks = <&adrf6780_lo>;
+ clock-names = "lo_in";
+ adi,parity-en;
+ };
+ };
+...
+
--
2.32.0