Use rev instead of revn to identify the SKU. This is in
preparation to the introduction of 7c3 gpu which won't have a
revn.
Signed-off-by: Akhil P Oommen <[email protected]>
---
(no changes since v1)
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 183b9f9..0da1a66 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1675,11 +1675,11 @@ static u32 a618_get_speed_bin(u32 fuse)
return UINT_MAX;
}
-static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse)
+static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse)
{
u32 val = UINT_MAX;
- if (revn == 618)
+ if (adreno_cmp_rev(ADRENO_REV(6, 1, 8, ANY_ID), rev))
val = a618_get_speed_bin(fuse);
if (val == UINT_MAX) {
@@ -1692,8 +1692,7 @@ static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse)
return (1 << val);
}
-static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
- u32 revn)
+static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
{
u32 supp_hw = UINT_MAX;
u16 speedbin;
@@ -1714,7 +1713,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
}
speedbin = le16_to_cpu(speedbin);
- supp_hw = fuse_to_supp_hw(dev, revn, speedbin);
+ supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
done:
ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);
@@ -1785,7 +1784,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
a6xx_llc_slices_init(pdev, a6xx_gpu);
- ret = a6xx_set_supported_hw(&pdev->dev, a6xx_gpu, info->revn);
+ ret = a6xx_set_supported_hw(&pdev->dev, config->rev);
if (ret) {
a6xx_destroy(&(a6xx_gpu->base.base));
return ERR_PTR(ret);
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.
On Thu, Jul 29, 2021 at 7:33 AM Akhil P Oommen <[email protected]> wrote:
>
> Use rev instead of revn to identify the SKU. This is in
> preparation to the introduction of 7c3 gpu which won't have a
> revn.
>
> Signed-off-by: Akhil P Oommen <[email protected]>
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++++------
> 1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index 183b9f9..0da1a66 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -1675,11 +1675,11 @@ static u32 a618_get_speed_bin(u32 fuse)
> return UINT_MAX;
> }
>
> -static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse)
> +static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse)
> {
> u32 val = UINT_MAX;
>
> - if (revn == 618)
> + if (adreno_cmp_rev(ADRENO_REV(6, 1, 8, ANY_ID), rev))
Looks like adreno_cmp_rev() ended up in patch 3/3 when it should have
been in this patch..
But I guess we could also move this into adreno_is_a618() and use that here
BR,
-R
> val = a618_get_speed_bin(fuse);
>
> if (val == UINT_MAX) {
> @@ -1692,8 +1692,7 @@ static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse)
> return (1 << val);
> }
>
> -static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
> - u32 revn)
> +static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
> {
> u32 supp_hw = UINT_MAX;
> u16 speedbin;
> @@ -1714,7 +1713,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
> }
> speedbin = le16_to_cpu(speedbin);
>
> - supp_hw = fuse_to_supp_hw(dev, revn, speedbin);
> + supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
>
> done:
> ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);
> @@ -1785,7 +1784,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
>
> a6xx_llc_slices_init(pdev, a6xx_gpu);
>
> - ret = a6xx_set_supported_hw(&pdev->dev, a6xx_gpu, info->revn);
> + ret = a6xx_set_supported_hw(&pdev->dev, config->rev);
> if (ret) {
> a6xx_destroy(&(a6xx_gpu->base.base));
> return ERR_PTR(ret);
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation.
>
On 7/29/2021 8:57 PM, Rob Clark wrote:
> On Thu, Jul 29, 2021 at 7:33 AM Akhil P Oommen <[email protected]> wrote:
>>
>> Use rev instead of revn to identify the SKU. This is in
>> preparation to the introduction of 7c3 gpu which won't have a
>> revn.
>>
>> Signed-off-by: Akhil P Oommen <[email protected]>
>> ---
>>
>> (no changes since v1)
>>
>> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++++------
>> 1 file changed, 5 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> index 183b9f9..0da1a66 100644
>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> @@ -1675,11 +1675,11 @@ static u32 a618_get_speed_bin(u32 fuse)
>> return UINT_MAX;
>> }
>>
>> -static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse)
>> +static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse)
>> {
>> u32 val = UINT_MAX;
>>
>> - if (revn == 618)
>> + if (adreno_cmp_rev(ADRENO_REV(6, 1, 8, ANY_ID), rev))
>
> Looks like adreno_cmp_rev() ended up in patch 3/3 when it should have
> been in this patch..
>
> But I guess we could also move this into adreno_is_a618() and use that here
>
> BR,
> -R
Ahh! I reordered the patches. This is too early in the probe sequence to
call adreno_is_axxx(), right?
-Akhil.
>
>> val = a618_get_speed_bin(fuse);
>>
>> if (val == UINT_MAX) {
>> @@ -1692,8 +1692,7 @@ static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse)
>> return (1 << val);
>> }
>>
>> -static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
>> - u32 revn)
>> +static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
>> {
>> u32 supp_hw = UINT_MAX;
>> u16 speedbin;
>> @@ -1714,7 +1713,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
>> }
>> speedbin = le16_to_cpu(speedbin);
>>
>> - supp_hw = fuse_to_supp_hw(dev, revn, speedbin);
>> + supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
>>
>> done:
>> ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);
>> @@ -1785,7 +1784,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
>>
>> a6xx_llc_slices_init(pdev, a6xx_gpu);
>>
>> - ret = a6xx_set_supported_hw(&pdev->dev, a6xx_gpu, info->revn);
>> + ret = a6xx_set_supported_hw(&pdev->dev, config->rev);
>> if (ret) {
>> a6xx_destroy(&(a6xx_gpu->base.base));
>> return ERR_PTR(ret);
>> --
>> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
>> of Code Aurora Forum, hosted by The Linux Foundation.
>>
On Thu, Jul 29, 2021 at 8:36 AM Akhil P Oommen <[email protected]> wrote:
>
> On 7/29/2021 8:57 PM, Rob Clark wrote:
> > On Thu, Jul 29, 2021 at 7:33 AM Akhil P Oommen <[email protected]> wrote:
> >>
> >> Use rev instead of revn to identify the SKU. This is in
> >> preparation to the introduction of 7c3 gpu which won't have a
> >> revn.
> >>
> >> Signed-off-by: Akhil P Oommen <[email protected]>
> >> ---
> >>
> >> (no changes since v1)
> >>
> >> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++++------
> >> 1 file changed, 5 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> >> index 183b9f9..0da1a66 100644
> >> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> >> @@ -1675,11 +1675,11 @@ static u32 a618_get_speed_bin(u32 fuse)
> >> return UINT_MAX;
> >> }
> >>
> >> -static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse)
> >> +static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse)
> >> {
> >> u32 val = UINT_MAX;
> >>
> >> - if (revn == 618)
> >> + if (adreno_cmp_rev(ADRENO_REV(6, 1, 8, ANY_ID), rev))
> >
> > Looks like adreno_cmp_rev() ended up in patch 3/3 when it should have
> > been in this patch..
> >
> > But I guess we could also move this into adreno_is_a618() and use that here
> >
> > BR,
> > -R
> Ahh! I reordered the patches. This is too early in the probe sequence to
> call adreno_is_axxx(), right?
ahh, right, I guess you do still need to open code adreno_cmp_rev()
here.. but you can at least move adreno_cmp_rev() into this patch.
BR,
-R
>
> -Akhil.
> >
> >> val = a618_get_speed_bin(fuse);
> >>
> >> if (val == UINT_MAX) {
> >> @@ -1692,8 +1692,7 @@ static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse)
> >> return (1 << val);
> >> }
> >>
> >> -static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
> >> - u32 revn)
> >> +static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
> >> {
> >> u32 supp_hw = UINT_MAX;
> >> u16 speedbin;
> >> @@ -1714,7 +1713,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu,
> >> }
> >> speedbin = le16_to_cpu(speedbin);
> >>
> >> - supp_hw = fuse_to_supp_hw(dev, revn, speedbin);
> >> + supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
> >>
> >> done:
> >> ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1);
> >> @@ -1785,7 +1784,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
> >>
> >> a6xx_llc_slices_init(pdev, a6xx_gpu);
> >>
> >> - ret = a6xx_set_supported_hw(&pdev->dev, a6xx_gpu, info->revn);
> >> + ret = a6xx_set_supported_hw(&pdev->dev, config->rev);
> >> if (ret) {
> >> a6xx_destroy(&(a6xx_gpu->base.base));
> >> return ERR_PTR(ret);
> >> --
> >> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> >> of Code Aurora Forum, hosted by The Linux Foundation.
> >>
>