The NXP i.MX 8QuadXPlus SOC has a new ADC IP. These patches add
driver support for this ADC
dt-bindings: iio: adc:
v1->v2: *Fix some indentation issues.
*Mark status as okay.
*Change clock2 source.
iio: imx8qxp-adc:
v1->v2: *Squash patches 1, 2, 3, and 5 into a single patch.
*Add device specific prefix.
*Remove the brackets around individual numbers.
*Make use of FIELD_PREP() and FIELD_GET().
*Remove a lot of cache values.
*Replace mlock with adc->lock.
*Move adc->value read from isr to the completion.
*Set pm_runtime_disable/_put_noidle() before adc_disable.
*Add error handler-err_disable_reg/err_unprepare_clk.
v2->v3: *Add "return 0" to adc_runtime_resume()
v1 link:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
Cai Huoqing (3):
iio: imx8qxp-adc: Add driver support for NXP IMX8QXP ADC
dt-bindings: iio: adc: Add the binding documentation for NXP IMX8QXP
ADC
MAINTAINERS: Add the driver info of the NXP IMX8QXP ADC
.../bindings/iio/adc/nxp,imx8qxp-adc.yaml | 85 ++++
MAINTAINERS | 7 +
drivers/iio/adc/Kconfig | 10 +
drivers/iio/adc/Makefile | 1 +
drivers/iio/adc/imx8qxp-adc.c | 470 ++++++++++++++++++
5 files changed, 573 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
create mode 100644 drivers/iio/adc/imx8qxp-adc.c
--
2.25.1
The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add the binding
documentation for NXP IMX8QXP ADC.
Signed-off-by: Cai Huoqing <[email protected]>
---
v1->v2: *Fix some indentation issues.
*Mark status as okay.
*Change clock2 source.
v1 link:
https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
.../bindings/iio/adc/nxp,imx8qxp-adc.yaml | 85 +++++++++++++++++++
1 file changed, 85 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
new file mode 100644
index 000000000000..77501898a563
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP IMX8QXP ADC bindings
+
+maintainers:
+ - Cai Huoqing <[email protected]>
+
+description:
+ Supports the ADC found on the IMX8QXP SoC.
+
+properties:
+ compatible:
+ const: nxp,imx8qxp-adc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: per
+ - const: ipg
+
+ assigned-clocks:
+ maxItems: 1
+
+ assigned-clocks-rate:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ status:
+ const: disable
+
+ "#io-channel-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupts-parent
+ - clocks
+ - clock-names
+ - assigned-clocks
+ - assigned-clock-rates
+ - power-domains
+ - state
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/firmware/imx/rsrc.h>
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ adc@5a880000 {
+ compatible = "nxp,imx8qxp-adc";
+ reg = <0x0 0x5a880000 0x0 0x10000>;
+ interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX_SC_R_ADC_0>,
+ <&clk IMX_SC_R_ADC_0>;
+ clock-names = "per", "ipg";
+ assigned-clocks = <&clk IMX_SC_R_ADC_0>;
+ assigned-clock-rates = <24000000>;
+ power-domains = <&pd IMX_SC_R_ADC_0>;
+ status = "okay";
+ #io-channel-cells = <1>;
+ };
+ };
+...
--
2.25.1
The NXP i.MX 8QuadXPlus SOC has a new ADC IP. After adding
the driver support for it, I add the driver info of the
NXP IMX8QXP ADC to MAINTAINERS file.
Signed-off-by: Cai Huoqing <[email protected]>
---
MAINTAINERS | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index f800abca74b0..de98fcf75b01 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13475,6 +13475,13 @@ S: Maintained
F: Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
F: drivers/gpu/drm/imx/dcss/
+NXP i.MX 8QXP ADC DRIVER
+M: Cai Huoqing <[email protected]>
+L: [email protected]
+S: Supported
+F: Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
+F: drivers/iio/adc/imx8qxp-adc.c
+
NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
M: Jagan Teki <[email protected]>
S: Maintained
--
2.25.1
On Tue, 07 Sep 2021 09:57:22 +0800, Cai Huoqing wrote:
> The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add the binding
> documentation for NXP IMX8QXP ADC.
>
> Signed-off-by: Cai Huoqing <[email protected]>
> ---
> v1->v2: *Fix some indentation issues.
> *Mark status as okay.
> *Change clock2 source.
> v1 link:
> https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
>
> .../bindings/iio/adc/nxp,imx8qxp-adc.yaml | 85 +++++++++++++++++++
> 1 file changed, 85 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.example.dt.yaml: soc: adc@5a880000:reg:0: [0, 1518862336, 0, 65536] is too long
From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.example.dt.yaml: adc@5a880000: 'interrupts-parent' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.example.dt.yaml: adc@5a880000: 'state' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.example.dt.yaml: adc@5a880000: '#address-cells' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.example.dt.yaml: adc@5a880000: '#size-cells' is a required property
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.example.dt.yaml: adc@5a880000: 'assigned-clock-rates' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1525098
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
On Tue, Sep 07, 2021 at 09:57:22AM +0800, Cai Huoqing wrote:
> The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add the binding
> documentation for NXP IMX8QXP ADC.
>
> Signed-off-by: Cai Huoqing <[email protected]>
> ---
> v1->v2: *Fix some indentation issues.
> *Mark status as okay.
> *Change clock2 source.
> v1 link:
> https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
>
> .../bindings/iio/adc/nxp,imx8qxp-adc.yaml | 85 +++++++++++++++++++
> 1 file changed, 85 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
> new file mode 100644
> index 000000000000..77501898a563
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
> @@ -0,0 +1,85 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP IMX8QXP ADC bindings
> +
> +maintainers:
> + - Cai Huoqing <[email protected]>
> +
> +description:
> + Supports the ADC found on the IMX8QXP SoC.
> +
> +properties:
> + compatible:
> + const: nxp,imx8qxp-adc
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 2
> +
> + clock-names:
> + items:
> + - const: per
> + - const: ipg
> +
> + assigned-clocks:
> + maxItems: 1
> +
> + assigned-clocks-rate:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + status:
> + const: disable
???
You don't need 'status' in bindings. Plus this would cause 'status =
"okay"' to cause an error in your dts files.
> +
> + "#io-channel-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - interrupts-parent
It is valid for interrupt-parent to be in a parent node, so it is never
required.
> + - clocks
> + - clock-names
> + - assigned-clocks
> + - assigned-clock-rates
> + - power-domains
> + - state
Not documented.
> + - "#address-cells"
> + - "#size-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/firmware/imx/rsrc.h>
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + adc@5a880000 {
> + compatible = "nxp,imx8qxp-adc";
> + reg = <0x0 0x5a880000 0x0 0x10000>;
> + interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX_SC_R_ADC_0>,
> + <&clk IMX_SC_R_ADC_0>;
> + clock-names = "per", "ipg";
> + assigned-clocks = <&clk IMX_SC_R_ADC_0>;
> + assigned-clock-rates = <24000000>;
> + power-domains = <&pd IMX_SC_R_ADC_0>;
> + status = "okay";
Remove status from examples.
> + #io-channel-cells = <1>;
> + };
> + };
> +...
> --
> 2.25.1
>
>