This series includes 5 patches:
1.add rsel define.
2.change pull up/down description
3.fix coding style
4.support rsel feature for common ICs
5.add rsel setting on MT8195
Changes in patch v12:
1)add "ack-by" on "rsel define" patch.
2)add "change reason" in commit message and write a shema
on patch document patch 2/5.
3)separate eint pm_ops fucntion support patch
4)separate rsel patch, the common parts as patch 4/5 to support
common ICs. The mt8195 specific changes as patch 5/5.
5)add fix coding style patch to fix Camel spelling to avoid checkpatch
warning in a following patch.
6)remove unrelated changes in rsel patch.
7)change ternary ops in resel patch
8)add "rsel_is_unit" property on struct mtk_pinctrl, and itendify
"mediatek,rsel_resistance_in_si_unit" property in probe function.
9)add explanation for "MTK_PULL_RSEL_TYPE" and "MTK_PULL_PU_PD_RSEL_TYPE".
10) fix spell warning in rsel patch.
Changes in patch v11:
1)add pm_ops fucntion support
2)change pull up/down description
3)add resistance value feature support.
Changes in patch v10:
1)fix PARENTHESIS_ALIGNMENT of mtk_pinconf_bias_set_rsel
2)fix LONG_LINE warning in 615 in pinctrl-paris.c.
Changes in patch v9:
1)fix "mtk_pinconf_bias_set_rsel" build warning.
Changes in patch v8:
1)add rsel define patch
2)avoid CamelCase
3)add pinctrl rsel setting patch which is another resistance selection
solution for I2C on MT8195.
Changes in patch v7:
1)add version in patch and fix spelling mistakes.
Changes in patch v6:
1)add "pintcrl: mediatek" as prefix.
Changes in patch v5:
1)document and driver patch are apploed.
2)change '-EOPNOTSUPP' to '-ENOTSUPP'
Changes in patch v4:
1)fix pinctrl-mt8195.yaml warning error.
2)remove pinctrl device node patch which is based on "mt8195.dtsi".
Changes in patch v3:
1)change '^pins' to '-pins$'.
2)change 'state_0_node_a' to 'gpio_pin' which is defined in dts.
3)change 'state_0_node_b' to 'i2c0_pin' which is defined in dts.
4)reorder this series patches. change pinctrl file and binding document
together in one patch.
There are no changes in v1 & v2.
Zhiyong Tao (5):
dt-bindings: pinctrl: mt8195: add rsel define
dt-bindings: pinctrl: mt8195: change pull up/down description
pinctrl: mediatek: fix coding style
pinctrl: mediatek: support rsel feature
pinctrl: mediatek: add rsel setting on MT8195
.../bindings/pinctrl/pinctrl-mt8195.yaml | 65 ++++-
drivers/pinctrl/mediatek/pinctrl-mt8195.c | 133 ++++++++++
.../pinctrl/mediatek/pinctrl-mtk-common-v2.c | 231 +++++++++++++++---
.../pinctrl/mediatek/pinctrl-mtk-common-v2.h | 45 ++++
drivers/pinctrl/mediatek/pinctrl-paris.c | 68 ++++--
include/dt-bindings/pinctrl/mt65xx.h | 9 +
6 files changed, 497 insertions(+), 54 deletions(-)
--
2.18.0
For supporting SI units in "bias-pull-down" & "bias-pull-up",
Change pull up/down description
Signed-off-by: Zhiyong Tao <[email protected]>
---
.../bindings/pinctrl/pinctrl-mt8195.yaml | 65 ++++++++++++++++++-
1 file changed, 63 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
index 2f12ec59eee5..e6fc7a2978dc 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
@@ -85,9 +85,70 @@ patternProperties:
2/4/6/8/10/12/14/16mA in mt8195.
enum: [0, 1, 2, 3, 4, 5, 6, 7]
- bias-pull-down: true
+ bias-pull-down:
+ description: |
+ For pull down type is normal, it don't need add RSEL & R1R0 define
+ and resistance value.
+ For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
+ set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+ "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+ define in mt8195.
+ For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
+ to set different resistance by identifying property "mediatek,rsel_resistance_in_si_unit".
+ It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
+ & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100"
+ & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
+ define in mt8195. It can also support resistance value(ohm) "75000" & "5000" in mt8195.
+ An example of using RSEL define:
+ pincontroller {
+ i2c0_pin {
+ pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
+ bias-pull-up = <MTK_PULL_SET_RSEL_001>;
+ };
+ };
+ An example of using si unit resistance value(ohm):
+ &pio {
+ mediatek,rsel_resistance_in_si_unit;
+ }
+ pincontroller {
+ i2c0_pin {
+ pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
+ bias-pull-down = <75000>;
+ };
+ };
- bias-pull-up: true
+ bias-pull-up:
+ description: |
+ For pull up type is normal, it don't need add RSEL & R1R0 define
+ and resistance value.
+ For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
+ set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+ "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+ define in mt8195.
+ For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
+ to set different resistance by identifying property "mediatek,rsel_resistance_in_si_unit".
+ It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
+ & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100"
+ & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
+ define in mt8195. It can also support resistance value(ohm)
+ "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8195.
+ An example of using RSEL define:
+ pincontroller {
+ i2c0_pin {
+ pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
+ bias-pull-down = <MTK_PULL_SET_RSEL_001>;
+ };
+ };
+ An example of using si unit resistance value(ohm):
+ &pio {
+ mediatek,rsel_resistance_in_si_unit;
+ }
+ pincontroller {
+ i2c0_pin {
+ pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
+ bias-pull-down = <1000>;
+ };
+ };
bias-disable: true
--
2.25.1
I2C pins's resistance value can be controlled by rsel register.
This patch provides rsel (resistance selection) setting on MT8195
Signed-off-by: Zhiyong Tao <[email protected]>
---
drivers/pinctrl/mediatek/pinctrl-mt8195.c | 133 ++++++++++++++++++++++
1 file changed, 133 insertions(+)
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index a7500e18bb1d..9ba86c80c07a 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct mtk_pin_field_calc mt8195_pin_drv_adv_range[] = {
PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
};
+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[] = {
+ PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+ PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+ PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+ PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+ PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+ PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+ PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+ PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+ PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+ PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+ PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+ PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+ PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+ PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+ PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+ PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel mt8195_pin_rsel_val_range[] = {
+ PIN_RSEL(8, 17, 0x0, 75000, 75000),
+ PIN_RSEL(8, 17, 0x1, 10000, 5000),
+ PIN_RSEL(8, 17, 0x2, 5000, 75000),
+ PIN_RSEL(8, 17, 0x3, 4000, 5000),
+ PIN_RSEL(8, 17, 0x4, 3000, 75000),
+ PIN_RSEL(8, 17, 0x5, 2000, 5000),
+ PIN_RSEL(8, 17, 0x6, 1500, 75000),
+ PIN_RSEL(8, 17, 0x7, 1000, 5000),
+ PIN_RSEL(29, 30, 0x0, 75000, 75000),
+ PIN_RSEL(29, 30, 0x1, 10000, 5000),
+ PIN_RSEL(29, 30, 0x2, 5000, 75000),
+ PIN_RSEL(29, 30, 0x3, 4000, 5000),
+ PIN_RSEL(29, 30, 0x4, 3000, 75000),
+ PIN_RSEL(29, 30, 0x5, 2000, 5000),
+ PIN_RSEL(29, 30, 0x6, 1500, 75000),
+ PIN_RSEL(29, 30, 0x7, 1000, 5000),
+ PIN_RSEL(34, 35, 0x0, 75000, 75000),
+ PIN_RSEL(34, 35, 0x1, 10000, 5000),
+ PIN_RSEL(34, 35, 0x2, 5000, 75000),
+ PIN_RSEL(34, 35, 0x3, 4000, 5000),
+ PIN_RSEL(34, 35, 0x4, 3000, 75000),
+ PIN_RSEL(34, 35, 0x5, 2000, 5000),
+ PIN_RSEL(34, 35, 0x6, 1500, 75000),
+ PIN_RSEL(34, 35, 0x7, 1000, 5000),
+ PIN_RSEL(44, 45, 0x0, 75000, 75000),
+ PIN_RSEL(44, 45, 0x1, 10000, 5000),
+ PIN_RSEL(44, 45, 0x2, 5000, 75000),
+ PIN_RSEL(44, 45, 0x3, 4000, 5000),
+ PIN_RSEL(44, 45, 0x4, 3000, 75000),
+ PIN_RSEL(44, 45, 0x5, 2000, 5000),
+ PIN_RSEL(44, 45, 0x6, 1500, 75000),
+ PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+ MTK_PULL_PUPD_R1R0_TYPE /* 0 */, MTK_PULL_PUPD_R1R0_TYPE /* 1 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 2 */, MTK_PULL_PUPD_R1R0_TYPE /* 3 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 4 */, MTK_PULL_PUPD_R1R0_TYPE /* 5 */,
+ MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /* 7 */,
+ MTK_PULL_PU_PD_RSEL_TYPE /* 8 */, MTK_PULL_PU_PD_RSEL_TYPE /* 9 */,
+ MTK_PULL_PU_PD_RSEL_TYPE /* 10 */, MTK_PULL_PU_PD_RSEL_TYPE /* 11 */,
+ MTK_PULL_PU_PD_RSEL_TYPE /* 12 */, MTK_PULL_PU_PD_RSEL_TYPE /* 13 */,
+ MTK_PULL_PU_PD_RSEL_TYPE /* 14 */, MTK_PULL_PU_PD_RSEL_TYPE /* 15 */,
+ MTK_PULL_PU_PD_RSEL_TYPE /* 16 */, MTK_PULL_PU_PD_RSEL_TYPE /* 17 */,
+ MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE /* 19 */,
+ MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE /* 21 */,
+ MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE /* 23 */,
+ MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE /* 25 */,
+ MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE /* 27 */,
+ MTK_PULL_PU_PD_TYPE /* 28 */, MTK_PULL_PU_PD_RSEL_TYPE /* 29 */,
+ MTK_PULL_PU_PD_RSEL_TYPE /* 30 */, MTK_PULL_PU_PD_TYPE /* 31 */,
+ MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE /* 33 */,
+ MTK_PULL_PU_PD_RSEL_TYPE /* 34 */, MTK_PULL_PU_PD_RSEL_TYPE /* 35 */,
+ MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE /* 37 */,
+ MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE /* 39 */,
+ MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE /* 41 */,
+ MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE /* 43 */,
+ MTK_PULL_PU_PD_RSEL_TYPE /* 44 */, MTK_PULL_PU_PD_RSEL_TYPE /* 45 */,
+ MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE /* 47 */,
+ MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE /* 49 */,
+ MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE /* 51 */,
+ MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE /* 53 */,
+ MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE /* 55 */,
+ MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE /* 57 */,
+ MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE /* 59 */,
+ MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE /* 61 */,
+ MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE /* 63 */,
+ MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE /* 65 */,
+ MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE /* 67 */,
+ MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE /* 69 */,
+ MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE /* 71 */,
+ MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE /* 73 */,
+ MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE /* 75 */,
+ MTK_PULL_PU_PD_TYPE /* 76 */, MTK_PULL_PUPD_R1R0_TYPE /* 77 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 78 */, MTK_PULL_PUPD_R1R0_TYPE /* 79 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 80 */, MTK_PULL_PUPD_R1R0_TYPE /* 81 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 82 */, MTK_PULL_PUPD_R1R0_TYPE /* 83 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 84 */, MTK_PULL_PUPD_R1R0_TYPE /* 85 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 86 */, MTK_PULL_PUPD_R1R0_TYPE /* 87 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 88 */, MTK_PULL_PUPD_R1R0_TYPE /* 89 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 90 */, MTK_PULL_PUPD_R1R0_TYPE /* 91 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 92 */, MTK_PULL_PUPD_R1R0_TYPE /* 93 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 94 */, MTK_PULL_PUPD_R1R0_TYPE /* 95 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 96 */, MTK_PULL_PU_PD_TYPE /* 97 */,
+ MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE /* 99 */,
+ MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE /* 101 */,
+ MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE /* 103 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 104 */, MTK_PULL_PUPD_R1R0_TYPE /* 105 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 106 */, MTK_PULL_PUPD_R1R0_TYPE /* 107 */,
+ MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE /* 109 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 110 */, MTK_PULL_PUPD_R1R0_TYPE /* 111 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 112 */, MTK_PULL_PUPD_R1R0_TYPE /* 113 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 114 */, MTK_PULL_PUPD_R1R0_TYPE /* 115 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 116 */, MTK_PULL_PUPD_R1R0_TYPE /* 117 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 118 */, MTK_PULL_PUPD_R1R0_TYPE /* 119 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 120 */, MTK_PULL_PUPD_R1R0_TYPE /* 121 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 122 */, MTK_PULL_PUPD_R1R0_TYPE /* 123 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 124 */, MTK_PULL_PUPD_R1R0_TYPE /* 125 */,
+ MTK_PULL_PUPD_R1R0_TYPE /* 126 */, MTK_PULL_PUPD_R1R0_TYPE /* 127 */,
+ MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE /* 129 */,
+ MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE /* 131 */,
+ MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE /* 133 */,
+ MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE /* 135 */,
+ MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE /* 137 */,
+ MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE /* 139 */,
+ MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE /* 141 */,
+ MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE /* 143 */,
+};
+
static const struct mtk_pin_reg_calc mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8195_pin_mode_range),
[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
[PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
[PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
[PINCTRL_PIN_REG_DRV_ADV] = MTK_RANGE(mt8195_pin_drv_adv_range),
+ [PINCTRL_PIN_REG_RSEL] = MTK_RANGE(mt8195_pin_rsel_range),
};
static const char * const mt8195_pinctrl_register_base_names[] = {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc mt8195_data = {
.gpio_m = 0,
.base_names = mt8195_pinctrl_register_base_names,
.nbase_names = ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+ .pull_type = mt8195_pull_type,
+ .pin_rsel = mt8195_pin_rsel_val_range,
+ .npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
.bias_set_combo = mtk_pinconf_bias_set_combo,
.bias_get_combo = mtk_pinconf_bias_get_combo,
.drive_set = mtk_pinconf_drive_set_rev1,
--
2.25.1
Fix Camel spelling coding style to avoid checkpatch
warning in a following patch.
Signed-off-by: Zhiyong Tao <[email protected]>
---
drivers/pinctrl/mediatek/pinctrl-paris.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..38aec0177d15 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,7 +577,7 @@ static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int
mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)
ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
- unsigned int gpio, char *buf, unsigned int bufLen)
+ unsigned int gpio, char *buf, unsigned int buf_len)
{
int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
const struct mtk_pin_desc *desc;
@@ -610,7 +610,7 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
} else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
pullen = 0;
}
- len += scnprintf(buf + len, bufLen - len,
+ len += scnprintf(buf + len, buf_len - len,
"%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
gpio,
pinmux,
@@ -624,10 +624,10 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
pullup);
if (r1 != -1) {
- len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n",
+ len += scnprintf(buf + len, buf_len - len, " (%1d %1d)\n",
r1, r0);
} else {
- len += scnprintf(buf + len, bufLen - len, "\n");
+ len += scnprintf(buf + len, buf_len - len, "\n");
}
return len;
--
2.25.1
This patch supports rsel(resistance selection) feature for I2C pins.
It provides more resistance selection solution in different ICs.
It provides rsel define and si unit solution by identifying
"mediatek,rsel_resistance_in_si_unit" property in pio dtsi node.
Signed-off-by: Zhiyong Tao <[email protected]>
---
.../pinctrl/mediatek/pinctrl-mtk-common-v2.c | 231 +++++++++++++++---
.../pinctrl/mediatek/pinctrl-mtk-common-v2.h | 45 ++++
drivers/pinctrl/mediatek/pinctrl-paris.c | 60 +++--
3 files changed, 288 insertions(+), 48 deletions(-)
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..a73a5f624228 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -661,6 +661,181 @@ static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
return err;
}
+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc,
+ u32 pullup, u32 arg, u32 *rsel_val)
+{
+ const struct mtk_pin_rsel *rsel;
+ int check;
+ bool found = false;
+
+ rsel = hw->soc->pin_rsel;
+
+ for (check = 0; check <= hw->soc->npin_rsel - 1; check++) {
+ if (desc->number >= rsel[check].s_pin &&
+ desc->number <= rsel[check].e_pin) {
+ if (pullup) {
+ if (rsel[check].up_rsel == arg) {
+ found = true;
+ *rsel_val = rsel[check].rsel_index;
+ break;
+ }
+ } else {
+ if (rsel[check].down_rsel == arg) {
+ found = true;
+ *rsel_val = rsel[check].rsel_index;
+ break;
+ }
+ }
+ }
+ }
+
+ if (!found) {
+ dev_err(hw->dev, "Not support rsel value %d Ohm for pin = %d (%s)\n",
+ arg, desc->number, desc->name);
+ return -EOPNOTSUPP;
+ }
+
+ return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc,
+ u32 pullup, u32 arg)
+{
+ int err, rsel_val;
+
+ if (hw->rsel_si_unit) {
+ /* find pin rsel_index from pin_rsel array*/
+ err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg, &rsel_val);
+ if (err)
+ goto out;
+ } else {
+ if (arg < MTK_PULL_SET_RSEL_000 ||
+ arg > MTK_PULL_SET_RSEL_111) {
+ err = -EINVAL;
+ goto out;
+ }
+
+ rsel_val = arg - MTK_PULL_SET_RSEL_000;
+ }
+
+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, rsel_val);
+ if (err)
+ goto out;
+
+ err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, MTK_ENABLE);
+
+out:
+ return err;
+}
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc,
+ u32 pullup, u32 arg)
+{
+ int err = -EOPNOTSUPP;
+ u32 try_all_type;
+
+ if (hw->soc->pull_type)
+ try_all_type = hw->soc->pull_type[desc->number];
+ else
+ try_all_type = MTK_PULL_TYPE_MASK;
+
+ if (try_all_type & MTK_PULL_RSEL_TYPE) {
+ err = mtk_pinconf_bias_set_rsel(hw, desc, pullup, arg);
+ if (!err)
+ return err;
+ }
+
+ if (try_all_type & MTK_PULL_PU_PD_TYPE) {
+ err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
+ if (!err)
+ return err;
+ }
+
+ if (try_all_type & MTK_PULL_PULLSEL_TYPE) {
+ err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
+ pullup, arg);
+ if (!err)
+ return err;
+ }
+
+ if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE)
+ err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg);
+
+ if (err)
+ dev_err(hw->dev, "Invalid pull argument\n");
+
+ return err;
+}
+EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);
+
+static int mtk_rsel_get_si_unit(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc,
+ u32 pullup, u32 rsel_val, u32 *si_unit)
+{
+ const struct mtk_pin_rsel *rsel;
+ int check;
+
+ rsel = hw->soc->pin_rsel;
+
+ for (check = 0; check <= hw->soc->npin_rsel - 1; check++) {
+ if (desc->number >= rsel[check].s_pin &&
+ desc->number <= rsel[check].e_pin) {
+ if (rsel_val == rsel[check].rsel_index) {
+ if (pullup)
+ *si_unit = rsel[check].up_rsel;
+ else
+ *si_unit = rsel[check].down_rsel;
+ break;
+ }
+ }
+ }
+
+ return 0;
+}
+
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc,
+ u32 *pullup, u32 *enable)
+{
+ int pu, pd, rsel, err;
+
+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel);
+ if (err)
+ goto out;
+
+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu);
+ if (err)
+ goto out;
+
+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd);
+
+ if (pu == 0 && pd == 0) {
+ *pullup = 0;
+ *enable = MTK_DISABLE;
+ } else if (pu == 1 && pd == 0) {
+ *pullup = 1;
+ if (hw->rsel_si_unit)
+ mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable);
+ else
+ *enable = rsel + MTK_PULL_SET_RSEL_000;
+ } else if (pu == 0 && pd == 1) {
+ *pullup = 0;
+ if (hw->rsel_si_unit)
+ mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable);
+ else
+ *enable = rsel + MTK_PULL_SET_RSEL_000;
+ } else {
+ err = -EINVAL;
+ goto out;
+ }
+
+out:
+ return err;
+}
+
static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
const struct mtk_pin_desc *desc,
u32 *pullup, u32 *enable)
@@ -742,44 +917,40 @@ static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
return err;
}
-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
- const struct mtk_pin_desc *desc,
- u32 pullup, u32 arg)
-{
- int err;
-
- err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
- if (!err)
- goto out;
-
- err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup, arg);
- if (!err)
- goto out;
-
- err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg);
-
-out:
- return err;
-}
-EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);
-
int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
const struct mtk_pin_desc *desc,
u32 *pullup, u32 *enable)
{
- int err;
+ int err = -EOPNOTSUPP;
+ u32 try_all_type;
- err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
- if (!err)
- goto out;
+ if (hw->soc->pull_type)
+ try_all_type = hw->soc->pull_type[desc->number];
+ else
+ try_all_type = MTK_PULL_TYPE_MASK;
- err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup, enable);
- if (!err)
- goto out;
+ if (try_all_type & MTK_PULL_RSEL_TYPE) {
+ err = mtk_pinconf_bias_get_rsel(hw, desc, pullup, enable);
+ if (!err)
+ return err;
+ }
- err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable);
+ if (try_all_type & MTK_PULL_PU_PD_TYPE) {
+ err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
+ if (!err)
+ return err;
+ }
+
+ if (try_all_type & MTK_PULL_PULLSEL_TYPE) {
+ err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
+ pullup, enable);
+ if (!err)
+ return err;
+ }
+
+ if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE)
+ err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable);
-out:
return err;
}
EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..4908c7aedbe0 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,22 @@
#define MTK_ENABLE 1
#define MTK_PULLDOWN 0
#define MTK_PULLUP 1
+#define MTK_PULL_PU_PD_TYPE BIT(0)
+#define MTK_PULL_PULLSEL_TYPE BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE BIT(2)
+/* MTK_PULL_RSEL_TYPE can select resistance and can be
+ * turned on/off itself. But it can't be selected pull up/down
+ */
+#define MTK_PULL_RSEL_TYPE BIT(3)
+/* MTK_PULL_PU_PD_RSEL_TYPE is a type which is controlled by
+ * MTK_PULL_PU_PD_TYPE and MTK_PULL_RSEL_TYPE.
+ */
+#define MTK_PULL_PU_PD_RSEL_TYPE (MTK_PULL_PU_PD_TYPE \
+ | MTK_PULL_RSEL_TYPE)
+#define MTK_PULL_TYPE_MASK (MTK_PULL_PU_PD_TYPE |\
+ MTK_PULL_PULLSEL_TYPE |\
+ MTK_PULL_PUPD_R1R0_TYPE |\
+ MTK_PULL_RSEL_TYPE)
#define EINT_NA U16_MAX
#define NO_EINT_SUPPORT EINT_NA
@@ -42,6 +58,14 @@
PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
_x_bits, 32, 1)
+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl, _down_rsel) { \
+ .s_pin = _s_pin, \
+ .e_pin = _e_pin, \
+ .rsel_index = _rsel_index, \
+ .up_rsel = _up_resl, \
+ .down_rsel = _down_rsel, \
+ }
+
/* List these attributes which could be modified for the pin */
enum {
PINCTRL_PIN_REG_MODE,
@@ -67,6 +91,7 @@ enum {
PINCTRL_PIN_REG_DRV_E0,
PINCTRL_PIN_REG_DRV_E1,
PINCTRL_PIN_REG_DRV_ADV,
+ PINCTRL_PIN_REG_RSEL,
PINCTRL_PIN_REG_MAX,
};
@@ -129,6 +154,21 @@ struct mtk_pin_field_calc {
u8 fixed;
};
+/* struct mtk_pin_rsel - the structure that provides bias resistance selection.
+ * @s_pin: the start pin within the rsel range
+ * @e_pin: the end pin within the rsel range
+ * @rsel_index: the rsel bias resistance index
+ * @up_rsel: the pullup rsel bias resistance value
+ * @down_rsel: the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+ u16 s_pin;
+ u16 e_pin;
+ u16 rsel_index;
+ u32 up_rsel;
+ u32 down_rsel;
+};
+
/* struct mtk_pin_reg_calc - the structure that holds all ranges used to
* determine which register the pin would make use of
* for certain pin attribute.
@@ -206,6 +246,9 @@ struct mtk_pin_soc {
bool ies_present;
const char * const *base_names;
unsigned int nbase_names;
+ const unsigned int *pull_type;
+ const struct mtk_pin_rsel *pin_rsel;
+ unsigned int npin_rsel;
/* Specific pinconfig operations */
int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -254,6 +297,8 @@ struct mtk_pinctrl {
const char **grp_names;
/* lock pin's register resource to avoid multiple threads issue*/
spinlock_t lock;
+ /* identify rsel setting by si unit or rsel define in dts node */
+ bool rsel_si_unit;
};
void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set);
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 38aec0177d15..d4e02c5d74a8 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -579,8 +579,9 @@ static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int
ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
unsigned int gpio, char *buf, unsigned int buf_len)
{
- int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
+ int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1, rsel = -1;
const struct mtk_pin_desc *desc;
+ u32 try_all_type;
if (gpio >= hw->soc->npins)
return -EINVAL;
@@ -591,24 +592,39 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
pinmux -= hw->soc->nfuncs;
mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
- if (pullen == MTK_PUPD_SET_R1R0_00) {
- pullen = 0;
- r1 = 0;
- r0 = 0;
- } else if (pullen == MTK_PUPD_SET_R1R0_01) {
- pullen = 1;
- r1 = 0;
- r0 = 1;
- } else if (pullen == MTK_PUPD_SET_R1R0_10) {
- pullen = 1;
- r1 = 1;
- r0 = 0;
- } else if (pullen == MTK_PUPD_SET_R1R0_11) {
+
+ if (hw->soc->pull_type)
+ try_all_type = hw->soc->pull_type[desc->number];
+
+ if (hw->rsel_si_unit && (try_all_type & MTK_PULL_RSEL_TYPE)) {
+ rsel = pullen;
pullen = 1;
- r1 = 1;
- r0 = 1;
- } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
- pullen = 0;
+ } else {
+ /* Case for: R1R0 */
+ if (pullen == MTK_PUPD_SET_R1R0_00) {
+ pullen = 0;
+ r1 = 0;
+ r0 = 0;
+ } else if (pullen == MTK_PUPD_SET_R1R0_01) {
+ pullen = 1;
+ r1 = 0;
+ r0 = 1;
+ } else if (pullen == MTK_PUPD_SET_R1R0_10) {
+ pullen = 1;
+ r1 = 1;
+ r0 = 0;
+ } else if (pullen == MTK_PUPD_SET_R1R0_11) {
+ pullen = 1;
+ r1 = 1;
+ r0 = 1;
+ }
+
+ /* Case for: RSEL */
+ if (pullen >= MTK_PULL_SET_RSEL_000 &&
+ pullen <= MTK_PULL_SET_RSEL_111) {
+ rsel = pullen - MTK_PULL_SET_RSEL_000;
+ pullen = 1;
+ }
}
len += scnprintf(buf + len, buf_len - len,
"%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
@@ -626,6 +642,8 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
if (r1 != -1) {
len += scnprintf(buf + len, buf_len - len, " (%1d %1d)\n",
r1, r0);
+ } else if (rsel != -1) {
+ len += scnprintf(buf + len, buf_len - len, " (%1d)\n", rsel);
} else {
len += scnprintf(buf + len, buf_len - len, "\n");
}
@@ -970,6 +988,12 @@ int mtk_paris_pinctrl_probe(struct platform_device *pdev,
hw->nbase = hw->soc->nbase_names;
+ if (of_find_property(hw->dev->of_node,
+ "mediatek,rsel_resistance_in_si_unit", NULL))
+ hw->rsel_si_unit = true;
+ else
+ hw->rsel_si_unit = false;
+
spin_lock_init(&hw->lock);
err = mtk_pctrl_build_state(pdev);
--
2.25.1