The compatible "issi,is25wp256" is undocumented and instead only a
generic jedec,spi-nor should be used (if appropriate).
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Changes since v1:
1. New patch
---
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 2 +-
arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
index 60846e88ae4b..633b31b6e25c 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -63,7 +63,7 @@ &i2c0 {
&qspi0 {
status = "okay";
flash@0 {
- compatible = "issi,is25wp256", "jedec,spi-nor";
+ compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
m25p,fast-read;
diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
index 2e4ea84f27e7..9b0b9b85040e 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
@@ -211,7 +211,7 @@ vdd_ldo11: ldo11 {
&qspi0 {
status = "okay";
flash@0 {
- compatible = "issi,is25wp256", "jedec,spi-nor";
+ compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
m25p,fast-read;
--
2.30.2
The DTSI file defines soc node and address/size cells, so there is no
point in duplicating it in DTS file.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Changes since v1:
1. None
---
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 5 -----
arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 5 -----
2 files changed, 10 deletions(-)
diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
index 2b4af7b4cc2f..ba304d4c455c 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -8,8 +8,6 @@
#define RTCCLK_FREQ 1000000
/ {
- #address-cells = <2>;
- #size-cells = <2>;
model = "SiFive HiFive Unleashed A00";
compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
"sifive,fu540";
@@ -27,9 +25,6 @@ memory@80000000 {
reg = <0x0 0x80000000 0x2 0x00000000>;
};
- soc {
- };
-
hfclk: hfclk {
#clock-cells = <0>;
compatible = "fixed-clock";
diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
index 9b0b9b85040e..4f66919215f6 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
@@ -8,8 +8,6 @@
#define RTCCLK_FREQ 1000000
/ {
- #address-cells = <2>;
- #size-cells = <2>;
model = "SiFive HiFive Unmatched A00";
compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
"sifive,fu740";
@@ -27,9 +25,6 @@ memory@80000000 {
reg = <0x0 0x80000000 0x4 0x00000000>;
};
- soc {
- };
-
hfclk: hfclk {
#clock-cells = <0>;
compatible = "fixed-clock";
--
2.30.2
The Microchip Icicle kit uses SiFive E51 and U54 cores, so it looks that
also Core Local Interruptor and Platform-Level Interrupt Controller are
coming from SiFive. Add proper compatibles to silence dtbs_check
warnings:
clint@2000000: compatible:0: 'sifive,clint0' is not one of ['sifive,fu540-c000-clint', 'canaan,k210-clint']
interrupt-controller@c000000: compatible:0: 'sifive,plic-1.0.0' is not one of ['sifive,fu540-c000-plic', 'canaan,k210-plic']
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
---
Changes since v1:
1. None
---
arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
index b14275a9a59d..eb8b475b8611 100644
--- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
@@ -161,7 +161,7 @@ cache-controller@2010000 {
};
clint@2000000 {
- compatible = "sifive,clint0";
+ compatible = "sifive,fu540-c000-clint", "sifive,clint0";
reg = <0x0 0x2000000 0x0 0xC000>;
interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
&cpu1_intc 3 &cpu1_intc 7
@@ -172,7 +172,7 @@ &cpu3_intc 3 &cpu3_intc 7
plic: interrupt-controller@c000000 {
#interrupt-cells = <1>;
- compatible = "sifive,plic-1.0.0";
+ compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
reg = <0x0 0xc000000 0x0 0x4000000>;
riscv,ndev = <186>;
interrupt-controller;
--
2.30.2
hi Krzysztof,
On Mon, Sep 20, 2021 at 3:05 PM Krzysztof Kozlowski
<[email protected]> wrote:
>
> The compatible "issi,is25wp256" is undocumented and instead only a
> generic jedec,spi-nor should be used (if appropriate).
Why not do it the other way around? I mean adding this compatible to
the expected list: don't we lose information using the generic
compatible?
Thanks,
Alex
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v1:
> 1. New patch
> ---
> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 2 +-
> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> index 60846e88ae4b..633b31b6e25c 100644
> --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> @@ -63,7 +63,7 @@ &i2c0 {
> &qspi0 {
> status = "okay";
> flash@0 {
> - compatible = "issi,is25wp256", "jedec,spi-nor";
> + compatible = "jedec,spi-nor";
> reg = <0>;
> spi-max-frequency = <50000000>;
> m25p,fast-read;
> diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> index 2e4ea84f27e7..9b0b9b85040e 100644
> --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> @@ -211,7 +211,7 @@ vdd_ldo11: ldo11 {
> &qspi0 {
> status = "okay";
> flash@0 {
> - compatible = "issi,is25wp256", "jedec,spi-nor";
> + compatible = "jedec,spi-nor";
> reg = <0>;
> spi-max-frequency = <50000000>;
> m25p,fast-read;
> --
> 2.30.2
>
>
> _______________________________________________
> linux-riscv mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-riscv
On Mon, Sep 20, 2021 at 3:05 PM Krzysztof Kozlowski
<[email protected]> wrote:
>
> The DTSI file defines soc node and address/size cells, so there is no
> point in duplicating it in DTS file.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v1:
> 1. None
> ---
> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 5 -----
> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 5 -----
> 2 files changed, 10 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> index 2b4af7b4cc2f..ba304d4c455c 100644
> --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
> @@ -8,8 +8,6 @@
> #define RTCCLK_FREQ 1000000
>
> / {
> - #address-cells = <2>;
> - #size-cells = <2>;
> model = "SiFive HiFive Unleashed A00";
> compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
> "sifive,fu540";
> @@ -27,9 +25,6 @@ memory@80000000 {
> reg = <0x0 0x80000000 0x2 0x00000000>;
> };
>
> - soc {
> - };
> -
> hfclk: hfclk {
> #clock-cells = <0>;
> compatible = "fixed-clock";
> diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> index 9b0b9b85040e..4f66919215f6 100644
> --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> @@ -8,8 +8,6 @@
> #define RTCCLK_FREQ 1000000
>
> / {
> - #address-cells = <2>;
> - #size-cells = <2>;
> model = "SiFive HiFive Unmatched A00";
> compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
> "sifive,fu740";
> @@ -27,9 +25,6 @@ memory@80000000 {
> reg = <0x0 0x80000000 0x4 0x00000000>;
> };
>
> - soc {
> - };
> -
> hfclk: hfclk {
> #clock-cells = <0>;
> compatible = "fixed-clock";
> --
> 2.30.2
>
>
This looks good to me, you can add:
Reviewed-by: Alexandre Ghiti <[email protected]>
Tested-by: Alexandre Ghiti <[email protected]>
Thanks,
Alex
> _______________________________________________
> linux-riscv mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-riscv
On 12/10/2021 06:29, Alexandre Ghiti wrote:
> hi Krzysztof,
>
> On Mon, Sep 20, 2021 at 3:05 PM Krzysztof Kozlowski
> <[email protected]> wrote:
>>
>> The compatible "issi,is25wp256" is undocumented and instead only a
>> generic jedec,spi-nor should be used (if appropriate).
>
> Why not do it the other way around? I mean adding this compatible to
> the expected list: don't we lose information using the generic
> compatible?
>
> Thanks,
>
We discussed it:
https://lore.kernel.org/lkml/[email protected]/
Best regards,
Krzysztof
On 20/09/2021 15:02, Krzysztof Kozlowski wrote:
> The compatible "issi,is25wp256" is undocumented and instead only a
> generic jedec,spi-nor should be used (if appropriate).
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v1:
> 1. New patch
> ---
> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 2 +-
> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
Hi Paul and Palmer,
This set is waiting for quite a long. Do you pick DTS patches for Risc-v
or shall I send it to Arnd/Olof directly? I can do it, but it would be
great to have a confirmation of such merging path.
Best regards,
Krzysztof
On Mon, 20 Sep 2021 15:02:44 +0200, Krzysztof Kozlowski wrote:
> The compatible "issi,is25wp256" is undocumented and instead only a
> generic jedec,spi-nor should be used (if appropriate).
>
>
Applied, thanks!
[1/5] riscv: dts: sifive: use only generic JEDEC SPI NOR flash compatible
commit: 8ce936c2f1a68c3a4f46578eed016ff92a67fbc6
[2/5] riscv: dts: sifive: fix Unleashed board compatible
commit: 65b2979d52ebf96ed8261d82d84c62acf737548d
[3/5] riscv: dts: sifive: drop duplicated nodes and properties in sifive
commit: 20ce65bf89aab248886b80d1e7fa12277b2a0f2d
[4/5] riscv: dts: microchip: add missing compatibles for clint and plic
commit: 73d3c44115514616ee9c4f356bb86d4426d0fc36
[5/5] riscv: dts: sifive: add missing compatible for plic
commit: 9962a066f3c1d4588d0dd876ceac2c03ef87acf3
Best regards,
--
Krzysztof Kozlowski <[email protected]>