From: Sinthu Raja <[email protected]>
Hi,
This series of patches add support for J721e Starter kit(SK)[1]. J721e SK
is a low cost, small form factor board designed for TI’s J721E SoC.
Changes in V3:
- Introduced IPC sub mailbox nodes patch.
- Introduced DDR carveout memory nodes patch.
- Updated board name to starter kit
- Fixed DTS binding errors.
- Updated commit message, $subject which includes adding board URL,
V2: https://lore.kernel.org/all/[email protected]/
V1: https://lore.kernel.org/all/[email protected]/
[1]https://www.ti.com/tool/SK-TDA4VM
Sinthu Raja (4):
dt-bindings: arm: ti: Add compatible for J721E SK
arm64: dts: ti: Add support for J721E SK
arm64: dts: ti: k3-j721e-sk: Add IPC sub-mailbox nodes
arm64: dts: ti: k3-j721e-sk: Add DDR carveout memory nodes
.../devicetree/bindings/arm/ti/k3.yaml | 1 +
arch/arm64/boot/dts/ti/Makefile | 1 +
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 1002 +++++++++++++++++
3 files changed, 1004 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-sk.dts
--
2.31.1
From: Sinthu Raja <[email protected]>
Add the sub-mailbox nodes that are used to communicate between MPU and
various remote processors present in the J721E SoCs to the J721E EAIK
board. These include the R5F remote processors in the dual-R5F cluster
(MCU_R5FSS0) in the MCU domain and the two dual-R5F clusters
(MAIN_R5FSS0 & MAIN_R5FSS1) in the MAIN domain; the two C66x DSP remote
processors and the single C71x DSP remote processor in the MAIN domain.
These sub-mailbox nodes utilize the System Mailbox clusters 0 through 4.
All the remaining mailbox clusters are currently not used on A72 core,
and are hence disabled.
The sub-mailbox nodes added match the hard-coded mailbox configuration
used within the TI RTOS IPC software packages. The R5F processor
sub-systems are assumed to be running in Split mode, so a sub-mailbox
node is used by each of the R5F cores. Only the sub-mailbox node for
the first R5F core in each cluster is used in case of a Lockstep mode
for that R5F cluster.
Signed-off-by: Sinthu Raja <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 129 +++++++++++++++++++++++++
1 file changed, 129 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 2ca92ed12f03..7816aa9b06f0 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -727,3 +727,132 @@ &icssg1_mdio {
&ufs_wrapper {
status = "disabled";
};
+
+&mailbox0_cluster0 {
+ interrupts = <436>;
+
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ interrupts = <432>;
+
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ interrupts = <428>;
+
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster3 {
+ interrupts = <424>;
+
+ mbox_c66_0: mbox-c66-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c66_1: mbox-c66-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ interrupts = <420>;
+
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster5 {
+ status = "disabled";
+};
+
+&mailbox0_cluster6 {
+ status = "disabled";
+};
+
+&mailbox0_cluster7 {
+ status = "disabled";
+};
+
+&mailbox0_cluster8 {
+ status = "disabled";
+};
+
+&mailbox0_cluster9 {
+ status = "disabled";
+};
+
+&mailbox0_cluster10 {
+ status = "disabled";
+};
+
+&mailbox0_cluster11 {
+ status = "disabled";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+};
+
+&mcu_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+};
+
+&main_r5fss1_core0 {
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+};
+
+&main_r5fss1_core1 {
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+};
+
+&c66_0 {
+ mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
+};
+
+&c66_1 {
+ mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
+};
+
+&c71_0 {
+ mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+};
--
2.31.1
On Wed, 29 Sep 2021 13:43:29 +0530, Sinthu Raja wrote:
> From: Sinthu Raja <[email protected]>
>
> Hi,
> This series of patches add support for J721e Starter kit(SK)[1]. J721e SK
> is a low cost, small form factor board designed for TI’s J721E SoC.
>
> Changes in V3:
> - Introduced IPC sub mailbox nodes patch.
> - Introduced DDR carveout memory nodes patch.
> - Updated board name to starter kit
> - Fixed DTS binding errors.
> - Updated commit message, $subject which includes adding board URL,
>
> [...]
Hi Sinthu Raja,
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/4] dt-bindings: arm: ti: Add compatible for J721E SK
commit: 2927c9a56e36788859606f445a5290bf21c9ab53
[2/4] arm64: dts: ti: Add support for J721E SK
commit: 1bfda92a3a36c4dbd2b15a7f6660b673f4a2e475
[3/4] arm64: dts: ti: k3-j721e-sk: Add IPC sub-mailbox nodes
commit: e910e5b6763d8b895ca1bba918a39d20e3361358
[4/4] arm64: dts: ti: k3-j721e-sk: Add DDR carveout memory nodes
commit: f46d16cf5b43b66de030f0e3b2f20d24ba95f369
Side note:
- There are still cleanups that are in works (tsadc, cdns, etc..) - since
these are already present and active cleanup is going on, letting it past,
but if I do get a push back from upstream maintainers, I'd have to pull the
series back.
- I had applied the yaml cleanup for j721e, so I had to apply based on the
offset. Let me know if the changes are troublesome, else no action is
needed - I have built and run it through the usual guantlet as best as I
can.
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D)/Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D