From: Frieder Schrempf <[email protected]>
This is a set of enhancements and fixes for the devicetrees of the Kontron
SL/BL i.MX8MM SoMs and boards.
Frieder Schrempf (8):
arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on
SD card
arm64: dts: imx8mm-kontron: Make sure SOC and DRAM supply voltages are
correct
arm64: dts: imx8mm-kontron: Set VDD_SNVS to 800 mV
arm64: dts: imx8mm-kontron: Fix reg_rst_eth2 and reg_vdd_5v regulators
arm64: dts: imx8mm-kontron: Fix CAN SPI clock frequency
arm64: dts: imx8mm-kontron: Fix connection type for VSC8531 RGMII PHY
arm64: dts: imx8mm-kontron: Fix reset delays for ethernet PHY
arm64: dts: imx8mm-kontron: Leave reg_vdd_arm always powered on
.../dts/freescale/imx8mm-kontron-n801x-s.dts | 41 ++++++++++++++++---
.../freescale/imx8mm-kontron-n801x-som.dtsi | 13 ++++--
2 files changed, 44 insertions(+), 10 deletions(-)
--
2.33.0
From: Frieder Schrempf <[email protected]>
According to the datasheet VDD_SNVS should be 800 mV, so let's
make sure that the voltage won't be different.
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
Cc: [email protected]
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
index b12fb7ce6686..213014f59b46 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
@@ -152,8 +152,8 @@ reg_nvcc_snvs: LDO1 {
reg_vdd_snvs: LDO2 {
regulator-name = "ldo2";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <900000>;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
regulator-boot-on;
regulator-always-on;
};
--
2.33.0
From: Frieder Schrempf <[email protected]>
The regulator reg_vdd_5v represents the fixed 5V supply on the board which
can't be switched off. Mark it as always-on.
The regulator reg_rst_eth2 should keep the reset signal of the USB ethernet
adapter deassertet anytime. Fix the polarity and mark it as always-on.
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
Cc: [email protected]
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
index 62ba3bd08a0c..f2c8ccefd1bf 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
@@ -70,7 +70,9 @@ reg_rst_eth2: regulator-rst-eth2 {
regulator-name = "rst-usb-eth2";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_eth2>;
- gpio = <&gpio3 2 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
};
reg_vdd_5v: regulator-5v {
@@ -78,6 +80,7 @@ reg_vdd_5v: regulator-5v {
regulator-name = "vdd-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
+ regulator-always-on;
};
};
--
2.33.0
From: Frieder Schrempf <[email protected]>
When the cpufreq driver is enabled, the buck2 regulator is kept powered on
by the dependency between the CPU nodes with 'cpu-supply' set. Without the
cpufreq driver the kernel will power off the regulator as it doesn't see
any users. This is obviously not what we want, therefore keep the regulator
powered on in any case.
Reported-by: Heiko Thiery <[email protected]>
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
Cc: [email protected]
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
index 213014f59b46..c3418d263eb4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
@@ -105,6 +105,7 @@ reg_vdd_arm: BUCK2 {
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <950000>;
regulator-boot-on;
+ regulator-always-on;
regulator-ramp-delay = <3125>;
nxp,dvs-run-voltage = <950000>;
nxp,dvs-standby-voltage = <850000>;
--
2.33.0
From: Frieder Schrempf <[email protected]>
According to the datasheet the VSC8531 PHY expects a reset pulse of 100 ns
and a delay of 15 ms after the reset has been deasserted. Set the matching
values in the devicetree.
Reported-by: Heiko Thiery <[email protected]>
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
index 0e4509287a92..106e13945ae5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
@@ -124,8 +124,8 @@ mdio {
ethphy: ethernet-phy@0 {
reg = <0>;
- reset-assert-us = <100>;
- reset-deassert-us = <100>;
+ reset-assert-us = <1>;
+ reset-deassert-us = <15000>;
reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
};
};
--
2.33.0
From: Frieder Schrempf <[email protected]>
The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the
limit accordingly to prevent any performance issues caused by the
really low clock speed of 100 kHz.
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
Cc: [email protected]
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
index f2c8ccefd1bf..dbf11e03ecce 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
@@ -98,7 +98,7 @@ can0: can@0 {
clocks = <&osc_can>;
interrupt-parent = <&gpio4>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
- spi-max-frequency = <100000>;
+ spi-max-frequency = <10000000>;
vdd-supply = <®_vdd_3v3>;
xceiver-supply = <®_vdd_5v>;
};
--
2.33.0
From: Frieder Schrempf <[email protected]>
Previously we falsely relied on the PHY driver to unconditionally
enable the internal RX delay. Since the following fix for the PHY
driver this is not the case anymore:
commit 7b005a1742be ("net: phy: mscc: configure both RX and TX internal
delays for RGMII")
In order to enable the delay we need to set the connection type to
"rgmii-rxid".
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
Cc: [email protected]
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
index dbf11e03ecce..0e4509287a92 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
@@ -114,7 +114,7 @@ &ecspi3 {
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
- phy-connection-type = "rgmii";
+ phy-connection-type = "rgmii-rxid";
phy-handle = <ðphy>;
status = "okay";
--
2.33.0
Hi Frieder,
Am Do., 30. Sept. 2021 um 17:57 Uhr schrieb Frieder Schrempf <[email protected]>:
>
> From: Frieder Schrempf <[email protected]>
>
> When the cpufreq driver is enabled, the buck2 regulator is kept powered on
> by the dependency between the CPU nodes with 'cpu-supply' set. Without the
> cpufreq driver the kernel will power off the regulator as it doesn't see
> any users. This is obviously not what we want, therefore keep the regulator
> powered on in any case.
>
> Reported-by: Heiko Thiery <[email protected]>
> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
> Cc: [email protected]
> Signed-off-by: Frieder Schrempf <[email protected]>
Tested-by: Heiko Thiery <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> index 213014f59b46..c3418d263eb4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> @@ -105,6 +105,7 @@ reg_vdd_arm: BUCK2 {
> regulator-min-microvolt = <850000>;
> regulator-max-microvolt = <950000>;
> regulator-boot-on;
> + regulator-always-on;
> regulator-ramp-delay = <3125>;
> nxp,dvs-run-voltage = <950000>;
> nxp,dvs-standby-voltage = <850000>;
> --
> 2.33.0
>
From: Frieder Schrempf <[email protected]>
In order to use ultra high speed modes (UHS) on the SD card slot, we
add matching pinctrls and fix the voltage switching for LDO5 of the
PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
Signed-off-by: Frieder Schrempf <[email protected]>
---
.../dts/freescale/imx8mm-kontron-n801x-s.dts | 28 ++++++++++++++++++-
.../freescale/imx8mm-kontron-n801x-som.dtsi | 2 ++
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
index d17abb515835..62ba3bd08a0c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
@@ -189,8 +189,10 @@ usbnet: usbether@1 {
};
&usdhc2 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
vmmc-supply = <®_vdd_3v3>;
vqmmc-supply = <®_nvcc_sd>;
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
@@ -319,4 +321,28 @@ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>;
};
+
+ pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
+ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
+ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
+ >;
+ };
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
index d0456daefda8..03b3516abd64 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
@@ -86,6 +86,7 @@ pca9450: pmic@25 {
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
regulators {
reg_vdd_soc: BUCK1 {
@@ -225,6 +226,7 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
+ MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141
>;
};
--
2.33.0
From: Frieder Schrempf <[email protected]>
VDD_SOC should be 800 mV in suspend and 850 mV in run mode. VDD_DRAM
should be 950 mV for DDR clock frequencies of 1.5 GHz.
This information is taken from the datasheet and the uboot-imx code.
Signed-off-by: Frieder Schrempf <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
index 03b3516abd64..b12fb7ce6686 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
@@ -92,10 +92,12 @@ regulators {
reg_vdd_soc: BUCK1 {
regulator-name = "buck1";
regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <900000>;
+ regulator-max-microvolt = <850000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <3125>;
+ nxp,dvs-run-voltage = <850000>;
+ nxp,dvs-standby-voltage = <800000>;
};
reg_vdd_arm: BUCK2 {
@@ -111,7 +113,7 @@ reg_vdd_arm: BUCK2 {
reg_vdd_dram: BUCK3 {
regulator-name = "buck3";
regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <900000>;
+ regulator-max-microvolt = <950000>;
regulator-boot-on;
regulator-always-on;
};
--
2.33.0
On Thu, Sep 30, 2021 at 05:56:24PM +0200, Frieder Schrempf wrote:
> From: Frieder Schrempf <[email protected]>
>
> In order to use ultra high speed modes (UHS) on the SD card slot, we
> add matching pinctrls and fix the voltage switching for LDO5 of the
> PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> .../dts/freescale/imx8mm-kontron-n801x-s.dts | 28 ++++++++++++++++++-
> .../freescale/imx8mm-kontron-n801x-som.dtsi | 2 ++
> 2 files changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> index d17abb515835..62ba3bd08a0c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> @@ -189,8 +189,10 @@ usbnet: usbether@1 {
> };
>
> &usdhc2 {
> - pinctrl-names = "default";
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> pinctrl-0 = <&pinctrl_usdhc2>;
> + pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
> vmmc-supply = <®_vdd_3v3>;
> vqmmc-supply = <®_nvcc_sd>;
> cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> @@ -319,4 +321,28 @@ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
> MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
> >;
> };
> +
> + pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
Did you run dtbs_check on it?
Shawn
> + fsl,pins = <
> + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
> + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
> + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
> + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
> + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
> + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
> + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
> + >;
> + };
> +
> + pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
> + fsl,pins = <
> + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
> + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
> + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
> + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
> + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
> + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
> + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
> + >;
> + };
> };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> index d0456daefda8..03b3516abd64 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> @@ -86,6 +86,7 @@ pca9450: pmic@25 {
> pinctrl-0 = <&pinctrl_pmic>;
> interrupt-parent = <&gpio1>;
> interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> + sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
>
> regulators {
> reg_vdd_soc: BUCK1 {
> @@ -225,6 +226,7 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
> pinctrl_pmic: pmicgrp {
> fsl,pins = <
> MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
> + MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141
> >;
> };
>
> --
> 2.33.0
>
On Thu, Sep 30, 2021 at 05:56:25PM +0200, Frieder Schrempf wrote:
> From: Frieder Schrempf <[email protected]>
>
> VDD_SOC should be 800 mV in suspend and 850 mV in run mode. VDD_DRAM
> should be 950 mV for DDR clock frequencies of 1.5 GHz.
>
> This information is taken from the datasheet and the uboot-imx code.
I'm wondering where the existing settings were coming from?
Shawn
>
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> index 03b3516abd64..b12fb7ce6686 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> @@ -92,10 +92,12 @@ regulators {
> reg_vdd_soc: BUCK1 {
> regulator-name = "buck1";
> regulator-min-microvolt = <800000>;
> - regulator-max-microvolt = <900000>;
> + regulator-max-microvolt = <850000>;
> regulator-boot-on;
> regulator-always-on;
> regulator-ramp-delay = <3125>;
> + nxp,dvs-run-voltage = <850000>;
> + nxp,dvs-standby-voltage = <800000>;
> };
>
> reg_vdd_arm: BUCK2 {
> @@ -111,7 +113,7 @@ reg_vdd_arm: BUCK2 {
> reg_vdd_dram: BUCK3 {
> regulator-name = "buck3";
> regulator-min-microvolt = <850000>;
> - regulator-max-microvolt = <900000>;
> + regulator-max-microvolt = <950000>;
> regulator-boot-on;
> regulator-always-on;
> };
> --
> 2.33.0
>
On Thu, Sep 30, 2021 at 05:56:26PM +0200, Frieder Schrempf wrote:
> From: Frieder Schrempf <[email protected]>
>
> According to the datasheet VDD_SNVS should be 800 mV, so let's
> make sure that the voltage won't be different.
Could you share the datasheet?
Shawn
>
> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
> Cc: [email protected]
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> index b12fb7ce6686..213014f59b46 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> @@ -152,8 +152,8 @@ reg_nvcc_snvs: LDO1 {
>
> reg_vdd_snvs: LDO2 {
> regulator-name = "ldo2";
> - regulator-min-microvolt = <850000>;
> - regulator-max-microvolt = <900000>;
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <800000>;
> regulator-boot-on;
> regulator-always-on;
> };
> --
> 2.33.0
>
On Thu, Sep 30, 2021 at 05:56:27PM +0200, Frieder Schrempf wrote:
> From: Frieder Schrempf <[email protected]>
>
> The regulator reg_vdd_5v represents the fixed 5V supply on the board which
> can't be switched off. Mark it as always-on.
>
> The regulator reg_rst_eth2 should keep the reset signal of the USB ethernet
> adapter deassertet anytime. Fix the polarity and mark it as always-on.
It seems to be wrong from the beginning that the reset is modelled by a
regulator.
>
> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
> Cc: [email protected]
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> index 62ba3bd08a0c..f2c8ccefd1bf 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> @@ -70,7 +70,9 @@ reg_rst_eth2: regulator-rst-eth2 {
> regulator-name = "rst-usb-eth2";
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usb_eth2>;
> - gpio = <&gpio3 2 GPIO_ACTIVE_LOW>;
> + gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + regulator-always-on;
> };
>
> reg_vdd_5v: regulator-5v {
> @@ -78,6 +80,7 @@ reg_vdd_5v: regulator-5v {
> regulator-name = "vdd-5v";
> regulator-min-microvolt = <5000000>;
> regulator-max-microvolt = <5000000>;
> + regulator-always-on;
You do not have any on/off control over the regulator. So how does this
always-on property make any difference?
Shawn
> };
> };
>
> --
> 2.33.0
>
On Thu, Sep 30, 2021 at 05:56:28PM +0200, Frieder Schrempf wrote:
> From: Frieder Schrempf <[email protected]>
>
> The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the
> limit accordingly to prevent any performance issues caused by the
> really low clock speed of 100 kHz.
Could you share some testing result of this change?
>
> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
It's really an optimization rather than fix, isn't it?
Shawn
> Cc: [email protected]
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> index f2c8ccefd1bf..dbf11e03ecce 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> @@ -98,7 +98,7 @@ can0: can@0 {
> clocks = <&osc_can>;
> interrupt-parent = <&gpio4>;
> interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> - spi-max-frequency = <100000>;
> + spi-max-frequency = <10000000>;
> vdd-supply = <®_vdd_3v3>;
> xceiver-supply = <®_vdd_5v>;
> };
> --
> 2.33.0
>
On Thu, Sep 30, 2021 at 05:56:29PM +0200, Frieder Schrempf wrote:
> From: Frieder Schrempf <[email protected]>
>
> Previously we falsely relied on the PHY driver to unconditionally
> enable the internal RX delay. Since the following fix for the PHY
> driver this is not the case anymore:
>
> commit 7b005a1742be ("net: phy: mscc: configure both RX and TX internal
> delays for RGMII")
>
> In order to enable the delay we need to set the connection type to
> "rgmii-rxid".
Could you share some details of the issue that the delay is not enabled,
e.g. how broken the Ethernet support is without this change?
Shawn
>
> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
> Cc: [email protected]
> Signed-off-by: Frieder Schrempf <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> index dbf11e03ecce..0e4509287a92 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> @@ -114,7 +114,7 @@ &ecspi3 {
> &fec1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_enet>;
> - phy-connection-type = "rgmii";
> + phy-connection-type = "rgmii-rxid";
> phy-handle = <ðphy>;
> status = "okay";
>
> --
> 2.33.0
>
On Thu, Sep 30, 2021 at 05:56:31PM +0200, Frieder Schrempf wrote:
> From: Frieder Schrempf <[email protected]>
>
> When the cpufreq driver is enabled, the buck2 regulator is kept powered on
> by the dependency between the CPU nodes with 'cpu-supply' set. Without the
> cpufreq driver the kernel will power off the regulator as it doesn't see
> any users. This is obviously not what we want, therefore keep the regulator
> powered on in any case.
>
> Reported-by: Heiko Thiery <[email protected]>
> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
> Cc: [email protected]
> Signed-off-by: Frieder Schrempf <[email protected]>
Already picked up the one from Heiko.
https://lore.kernel.org/all/[email protected]/
Shawn
> ---
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> index 213014f59b46..c3418d263eb4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> @@ -105,6 +105,7 @@ reg_vdd_arm: BUCK2 {
> regulator-min-microvolt = <850000>;
> regulator-max-microvolt = <950000>;
> regulator-boot-on;
> + regulator-always-on;
> regulator-ramp-delay = <3125>;
> nxp,dvs-run-voltage = <950000>;
> nxp,dvs-standby-voltage = <850000>;
> --
> 2.33.0
>
On 05.10.21 08:53, Shawn Guo wrote:
> On Thu, Sep 30, 2021 at 05:56:25PM +0200, Frieder Schrempf wrote:
>> From: Frieder Schrempf <[email protected]>
>>
>> VDD_SOC should be 800 mV in suspend and 850 mV in run mode. VDD_DRAM
>> should be 950 mV for DDR clock frequencies of 1.5 GHz.
>>
>> This information is taken from the datasheet and the uboot-imx code.
>
> I'm wondering where the existing settings were coming from?
Good question, but I can't really retrace now how I actually determined
the values back then. Seems like I had failed to validate them properly.
>
>>
>> Signed-off-by: Frieder Schrempf <[email protected]>
>> ---
>> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> index 03b3516abd64..b12fb7ce6686 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> @@ -92,10 +92,12 @@ regulators {
>> reg_vdd_soc: BUCK1 {
>> regulator-name = "buck1";
>> regulator-min-microvolt = <800000>;
>> - regulator-max-microvolt = <900000>;
>> + regulator-max-microvolt = <850000>;
>> regulator-boot-on;
>> regulator-always-on;
>> regulator-ramp-delay = <3125>;
>> + nxp,dvs-run-voltage = <850000>;
>> + nxp,dvs-standby-voltage = <800000>;
>> };
>>
>> reg_vdd_arm: BUCK2 {
>> @@ -111,7 +113,7 @@ reg_vdd_arm: BUCK2 {
>> reg_vdd_dram: BUCK3 {
>> regulator-name = "buck3";
>> regulator-min-microvolt = <850000>;
>> - regulator-max-microvolt = <900000>;
>> + regulator-max-microvolt = <950000>;
>> regulator-boot-on;
>> regulator-always-on;
>> };
>> --
>> 2.33.0
>>
On 05.10.21 08:56, Shawn Guo wrote:
> On Thu, Sep 30, 2021 at 05:56:26PM +0200, Frieder Schrempf wrote:
>> From: Frieder Schrempf <[email protected]>
>>
>> According to the datasheet VDD_SNVS should be 800 mV, so let's
>> make sure that the voltage won't be different.
>
> Could you share the datasheet?
Sure, it's here: https://www.nxp.com/docs/en/data-sheet/IMX8MMIEC.pdf.
See table 10 for the operating voltages.
>>
>> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
>> Cc: [email protected]
>> Signed-off-by: Frieder Schrempf <[email protected]>
>> ---
>> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> index b12fb7ce6686..213014f59b46 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> @@ -152,8 +152,8 @@ reg_nvcc_snvs: LDO1 {
>>
>> reg_vdd_snvs: LDO2 {
>> regulator-name = "ldo2";
>> - regulator-min-microvolt = <850000>;
>> - regulator-max-microvolt = <900000>;
>> + regulator-min-microvolt = <800000>;
>> + regulator-max-microvolt = <800000>;
>> regulator-boot-on;
>> regulator-always-on;
>> };
>> --
>> 2.33.0
>>
On 05.10.21 09:09, Shawn Guo wrote:
> On Thu, Sep 30, 2021 at 05:56:27PM +0200, Frieder Schrempf wrote:
>> From: Frieder Schrempf <[email protected]>
>>
>> The regulator reg_vdd_5v represents the fixed 5V supply on the board which
>> can't be switched off. Mark it as always-on.
>>
>> The regulator reg_rst_eth2 should keep the reset signal of the USB ethernet
>> adapter deassertet anytime. Fix the polarity and mark it as always-on.
>
> It seems to be wrong from the beginning that the reset is modelled by a
> regulator.
Right, but at least at the time when I upstreamed this, there was no way
to pass the reset GPIO to a USB device driver and using a regulator
seems to be an accepted workaround as far as I understand.
>
>>
>> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
>> Cc: [email protected]
>> Signed-off-by: Frieder Schrempf <[email protected]>
>> ---
>> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> index 62ba3bd08a0c..f2c8ccefd1bf 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> @@ -70,7 +70,9 @@ reg_rst_eth2: regulator-rst-eth2 {
>> regulator-name = "rst-usb-eth2";
>> pinctrl-names = "default";
>> pinctrl-0 = <&pinctrl_usb_eth2>;
>> - gpio = <&gpio3 2 GPIO_ACTIVE_LOW>;
>> + gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
>> + enable-active-high;
>> + regulator-always-on;
>> };
>>
>> reg_vdd_5v: regulator-5v {
>> @@ -78,6 +80,7 @@ reg_vdd_5v: regulator-5v {
>> regulator-name = "vdd-5v";
>> regulator-min-microvolt = <5000000>;
>> regulator-max-microvolt = <5000000>;
>> + regulator-always-on;
>
> You do not have any on/off control over the regulator. So how does this
> always-on property make any difference?
Right, this doesn't make a difference and is definitely not a fix, I
will drop it. Anyway, this regulator is just there for completeness of
the hardware description.
>
>> };
>> };
>>
>> --
>> 2.33.0
>>
On 05.10.21 09:12, Shawn Guo wrote:
> On Thu, Sep 30, 2021 at 05:56:28PM +0200, Frieder Schrempf wrote:
>> From: Frieder Schrempf <[email protected]>
>>
>> The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the
>> limit accordingly to prevent any performance issues caused by the
>> really low clock speed of 100 kHz.
>
> Could you share some testing result of this change?
Without this change, receiving CAN messages on the board beyond a
certain bitrate will cause overrun errors (see 'ip -det -stat link show
can0').
With this fix, receiving messages on the bus works without any overrun
errors for bitrates up to 1 MBit.
>
>>
>> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
>
> It's really an optimization rather than fix, isn't it?
It removes the arbitrarily low limit on the SPI frequency, that was
caused by a typo in the original dts. As the usage of the CAN bus is
seriously affected by this I would consider it a fix. But if you think
otherwise, feel free to remove the Fixes tag.
>
> Shawn
>
>> Cc: [email protected]
>> Signed-off-by: Frieder Schrempf <[email protected]>
>> ---
>> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> index f2c8ccefd1bf..dbf11e03ecce 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> @@ -98,7 +98,7 @@ can0: can@0 {
>> clocks = <&osc_can>;
>> interrupt-parent = <&gpio4>;
>> interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
>> - spi-max-frequency = <100000>;
>> + spi-max-frequency = <10000000>;
>> vdd-supply = <®_vdd_3v3>;
>> xceiver-supply = <®_vdd_5v>;
>> };
>> --
>> 2.33.0
>>
On Tue, Oct 05, 2021 at 03:10:14PM +0200, Frieder Schrempf wrote:
> On 05.10.21 08:53, Shawn Guo wrote:
> > On Thu, Sep 30, 2021 at 05:56:25PM +0200, Frieder Schrempf wrote:
> >> From: Frieder Schrempf <[email protected]>
> >>
> >> VDD_SOC should be 800 mV in suspend and 850 mV in run mode. VDD_DRAM
> >> should be 950 mV for DDR clock frequencies of 1.5 GHz.
> >>
> >> This information is taken from the datasheet and the uboot-imx code.
> >
> > I'm wondering where the existing settings were coming from?
>
> Good question, but I can't really retrace now how I actually determined
> the values back then. Seems like I had failed to validate them properly.
Please update commit log with these background info.
Shawn
>
> >
> >>
> >> Signed-off-by: Frieder Schrempf <[email protected]>
> >> ---
> >> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 6 ++++--
> >> 1 file changed, 4 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> >> index 03b3516abd64..b12fb7ce6686 100644
> >> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> >> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> >> @@ -92,10 +92,12 @@ regulators {
> >> reg_vdd_soc: BUCK1 {
> >> regulator-name = "buck1";
> >> regulator-min-microvolt = <800000>;
> >> - regulator-max-microvolt = <900000>;
> >> + regulator-max-microvolt = <850000>;
> >> regulator-boot-on;
> >> regulator-always-on;
> >> regulator-ramp-delay = <3125>;
> >> + nxp,dvs-run-voltage = <850000>;
> >> + nxp,dvs-standby-voltage = <800000>;
> >> };
> >>
> >> reg_vdd_arm: BUCK2 {
> >> @@ -111,7 +113,7 @@ reg_vdd_arm: BUCK2 {
> >> reg_vdd_dram: BUCK3 {
> >> regulator-name = "buck3";
> >> regulator-min-microvolt = <850000>;
> >> - regulator-max-microvolt = <900000>;
> >> + regulator-max-microvolt = <950000>;
> >> regulator-boot-on;
> >> regulator-always-on;
> >> };
> >> --
> >> 2.33.0
> >>
On Tue, Oct 05, 2021 at 03:14:40PM +0200, Frieder Schrempf wrote:
> On 05.10.21 08:56, Shawn Guo wrote:
> > On Thu, Sep 30, 2021 at 05:56:26PM +0200, Frieder Schrempf wrote:
> >> From: Frieder Schrempf <[email protected]>
> >>
> >> According to the datasheet VDD_SNVS should be 800 mV, so let's
> >> make sure that the voltage won't be different.
> >
> > Could you share the datasheet?
>
> Sure, it's here: https://www.nxp.com/docs/en/data-sheet/IMX8MMIEC.pdf.
> See table 10 for the operating voltages.
Thanks for the link!
But datasheet specifies a voltage range. 800 mV is just the typical one.
The only problem I see is that regulator-min-microvolt should be lowered
to 800 mV. regulator-max-microvolt looks correct to me.
Shawn
>
> >>
> >> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
> >> Cc: [email protected]
> >> Signed-off-by: Frieder Schrempf <[email protected]>
> >> ---
> >> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 4 ++--
> >> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> >> index b12fb7ce6686..213014f59b46 100644
> >> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> >> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
> >> @@ -152,8 +152,8 @@ reg_nvcc_snvs: LDO1 {
> >>
> >> reg_vdd_snvs: LDO2 {
> >> regulator-name = "ldo2";
> >> - regulator-min-microvolt = <850000>;
> >> - regulator-max-microvolt = <900000>;
> >> + regulator-min-microvolt = <800000>;
> >> + regulator-max-microvolt = <800000>;
> >> regulator-boot-on;
> >> regulator-always-on;
> >> };
> >> --
> >> 2.33.0
> >>
On Tue, Oct 05, 2021 at 07:06:57PM +0200, Frieder Schrempf wrote:
> On 05.10.21 09:09, Shawn Guo wrote:
> > On Thu, Sep 30, 2021 at 05:56:27PM +0200, Frieder Schrempf wrote:
> >> From: Frieder Schrempf <[email protected]>
> >>
> >> The regulator reg_vdd_5v represents the fixed 5V supply on the board which
> >> can't be switched off. Mark it as always-on.
> >>
> >> The regulator reg_rst_eth2 should keep the reset signal of the USB ethernet
> >> adapter deassertet anytime. Fix the polarity and mark it as always-on.
> >
> > It seems to be wrong from the beginning that the reset is modelled by a
> > regulator.
>
> Right, but at least at the time when I upstreamed this, there was no way
> to pass the reset GPIO to a USB device driver and using a regulator
> seems to be an accepted workaround as far as I understand.
Do we have the solution in usb driver now? If so, we should probably
switch to that, instead of patching the workaround?
Shawn
>
> >
> >>
> >> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
> >> Cc: [email protected]
> >> Signed-off-by: Frieder Schrempf <[email protected]>
> >> ---
> >> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 5 ++++-
> >> 1 file changed, 4 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> >> index 62ba3bd08a0c..f2c8ccefd1bf 100644
> >> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> >> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> >> @@ -70,7 +70,9 @@ reg_rst_eth2: regulator-rst-eth2 {
> >> regulator-name = "rst-usb-eth2";
> >> pinctrl-names = "default";
> >> pinctrl-0 = <&pinctrl_usb_eth2>;
> >> - gpio = <&gpio3 2 GPIO_ACTIVE_LOW>;
> >> + gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
> >> + enable-active-high;
> >> + regulator-always-on;
> >> };
> >>
> >> reg_vdd_5v: regulator-5v {
> >> @@ -78,6 +80,7 @@ reg_vdd_5v: regulator-5v {
> >> regulator-name = "vdd-5v";
> >> regulator-min-microvolt = <5000000>;
> >> regulator-max-microvolt = <5000000>;
> >> + regulator-always-on;
> >
> > You do not have any on/off control over the regulator. So how does this
> > always-on property make any difference?
>
> Right, this doesn't make a difference and is definitely not a fix, I
> will drop it. Anyway, this regulator is just there for completeness of
> the hardware description.
>
> >
> >> };
> >> };
> >>
> >> --
> >> 2.33.0
> >>
On Tue, Oct 05, 2021 at 07:17:13PM +0200, Frieder Schrempf wrote:
> On 05.10.21 09:12, Shawn Guo wrote:
> > On Thu, Sep 30, 2021 at 05:56:28PM +0200, Frieder Schrempf wrote:
> >> From: Frieder Schrempf <[email protected]>
> >>
> >> The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the
> >> limit accordingly to prevent any performance issues caused by the
> >> really low clock speed of 100 kHz.
> >
> > Could you share some testing result of this change?
>
> Without this change, receiving CAN messages on the board beyond a
> certain bitrate will cause overrun errors (see 'ip -det -stat link show
> can0').
>
> With this fix, receiving messages on the bus works without any overrun
> errors for bitrates up to 1 MBit.
>
>
> >
> >>
> >> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
> >
> > It's really an optimization rather than fix, isn't it?
>
> It removes the arbitrarily low limit on the SPI frequency, that was
> caused by a typo in the original dts. As the usage of the CAN bus is
> seriously affected by this I would consider it a fix. But if you think
> otherwise, feel free to remove the Fixes tag.
Put all these good information into commit log, and I will be happy to
take it as a fix.
Shawn
> >> Cc: [email protected]
> >> Signed-off-by: Frieder Schrempf <[email protected]>
> >> ---
> >> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> >> index f2c8ccefd1bf..dbf11e03ecce 100644
> >> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> >> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
> >> @@ -98,7 +98,7 @@ can0: can@0 {
> >> clocks = <&osc_can>;
> >> interrupt-parent = <&gpio4>;
> >> interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> >> - spi-max-frequency = <100000>;
> >> + spi-max-frequency = <10000000>;
> >> vdd-supply = <®_vdd_3v3>;
> >> xceiver-supply = <®_vdd_5v>;
> >> };
> >> --
> >> 2.33.0
> >>
On 05.10.21 08:45, Shawn Guo wrote:
> On Thu, Sep 30, 2021 at 05:56:24PM +0200, Frieder Schrempf wrote:
>> From: Frieder Schrempf <[email protected]>
>>
>> In order to use ultra high speed modes (UHS) on the SD card slot, we
>> add matching pinctrls and fix the voltage switching for LDO5 of the
>> PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
>>
>> Signed-off-by: Frieder Schrempf <[email protected]>
>> ---
>> .../dts/freescale/imx8mm-kontron-n801x-s.dts | 28 ++++++++++++++++++-
>> .../freescale/imx8mm-kontron-n801x-som.dtsi | 2 ++
>> 2 files changed, 29 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> index d17abb515835..62ba3bd08a0c 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>> @@ -189,8 +189,10 @@ usbnet: usbether@1 {
>> };
>>
>> &usdhc2 {
>> - pinctrl-names = "default";
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> pinctrl-0 = <&pinctrl_usdhc2>;
>> + pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
>> vmmc-supply = <®_vdd_3v3>;
>> vqmmc-supply = <®_nvcc_sd>;
>> cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
>> @@ -319,4 +321,28 @@ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
>> MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>> >;
>> };
>> +
>> + pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
>
> Did you run dtbs_check on it?
Thanks for the reminder. I ran the check now and will fix up the node
names in v2.
>
>> + fsl,pins = <
>> + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
>> + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
>> + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
>> + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
>> + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
>> + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
>> + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>> + >;
>> + };
>> +
>> + pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
>> + fsl,pins = <
>> + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
>> + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
>> + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
>> + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
>> + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
>> + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
>> + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>> + >;
>> + };
>> };
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> index d0456daefda8..03b3516abd64 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
>> @@ -86,6 +86,7 @@ pca9450: pmic@25 {
>> pinctrl-0 = <&pinctrl_pmic>;
>> interrupt-parent = <&gpio1>;
>> interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
>> + sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
>>
>> regulators {
>> reg_vdd_soc: BUCK1 {
>> @@ -225,6 +226,7 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
>> pinctrl_pmic: pmicgrp {
>> fsl,pins = <
>> MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
>> + MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141
>> >;
>> };
>>
>> --
>> 2.33.0
>>
On 15.10.21 06:09, Shawn Guo wrote:
> On Tue, Oct 05, 2021 at 07:06:57PM +0200, Frieder Schrempf wrote:
>> On 05.10.21 09:09, Shawn Guo wrote:
>>> On Thu, Sep 30, 2021 at 05:56:27PM +0200, Frieder Schrempf wrote:
>>>> From: Frieder Schrempf <[email protected]>
>>>>
>>>> The regulator reg_vdd_5v represents the fixed 5V supply on the board which
>>>> can't be switched off. Mark it as always-on.
>>>>
>>>> The regulator reg_rst_eth2 should keep the reset signal of the USB ethernet
>>>> adapter deassertet anytime. Fix the polarity and mark it as always-on.
>>>
>>> It seems to be wrong from the beginning that the reset is modelled by a
>>> regulator.
>>
>> Right, but at least at the time when I upstreamed this, there was no way
>> to pass the reset GPIO to a USB device driver and using a regulator
>> seems to be an accepted workaround as far as I understand.
>
> Do we have the solution in usb driver now? If so, we should probably
> switch to that, instead of patching the workaround?
I had a look, but couldn't find anything. I remember there have been
efforts in the past to provide a generic way for usb devices to manage
resources like reset GPIOs and clocks (e.g. [1]), but it seems like
nothing of this ever got merged.
So for the moment I'd like to fix the existing solution, but I totally
agree that this should be solved properly in the future.
[1] https://lkml.org/lkml/2017/6/21/90
>
>>
>>>
>>>>
>>>> Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
>>>> Cc: [email protected]
>>>> Signed-off-by: Frieder Schrempf <[email protected]>
>>>> ---
>>>> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 5 ++++-
>>>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>>>> index 62ba3bd08a0c..f2c8ccefd1bf 100644
>>>> --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>>>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
>>>> @@ -70,7 +70,9 @@ reg_rst_eth2: regulator-rst-eth2 {
>>>> regulator-name = "rst-usb-eth2";
>>>> pinctrl-names = "default";
>>>> pinctrl-0 = <&pinctrl_usb_eth2>;
>>>> - gpio = <&gpio3 2 GPIO_ACTIVE_LOW>;
>>>> + gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
>>>> + enable-active-high;
>>>> + regulator-always-on;
>>>> };
>>>>
>>>> reg_vdd_5v: regulator-5v {
>>>> @@ -78,6 +80,7 @@ reg_vdd_5v: regulator-5v {
>>>> regulator-name = "vdd-5v";
>>>> regulator-min-microvolt = <5000000>;
>>>> regulator-max-microvolt = <5000000>;
>>>> + regulator-always-on;
>>>
>>> You do not have any on/off control over the regulator. So how does this
>>> always-on property make any difference?
>>
>> Right, this doesn't make a difference and is definitely not a fix, I
>> will drop it. Anyway, this regulator is just there for completeness of
>> the hardware description.
>>
>>>
>>>> };
>>>> };
>>>>
>>>> --
>>>> 2.33.0
>>>>