Enable Cadence PCIe, Cadence USB, TI USB and PCIe wrappers and required
SERDES drivers to support USB and PCIe on TI K3 SoCs.
Signed-off-by: Vignesh Raghavendra <[email protected]>
---
arch/arm64/configs/defconfig | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 0da6a944d5cd..55bb1e0e222d 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -236,6 +236,10 @@ CONFIG_PCIE_KIRIN=y
CONFIG_PCIE_HISI_STB=y
CONFIG_PCIE_TEGRA194_HOST=m
CONFIG_PCIE_VISCONTI_HOST=y
+CONFIG_PCIE_CADENCE_PLAT_HOST=y
+CONFIG_PCIE_CADENCE_PLAT_EP=y
+CONFIG_PCI_J721E_HOST=y
+CONFIG_PCI_J721E_EP=y
CONFIG_PCI_ENDPOINT=y
CONFIG_PCI_ENDPOINT_CONFIGFS=y
CONFIG_PCI_EPF_TEST=m
@@ -823,6 +827,10 @@ CONFIG_USB_RENESAS_USBHS_HCD=m
CONFIG_USB_RENESAS_USBHS=m
CONFIG_USB_ACM=m
CONFIG_USB_STORAGE=y
+CONFIG_USB_CDNS_SUPPORT=m
+CONFIG_USB_CDNS3=m
+CONFIG_USB_CDNS3_GADGET=y
+CONFIG_USB_CDNS3_HOST=y
CONFIG_USB_MTU3=y
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_SUNXI=y
@@ -1124,6 +1132,7 @@ CONFIG_RESET_RZG2L_USBPHY_CTRL=y
CONFIG_RESET_TI_SCI=y
CONFIG_PHY_XGENE=y
CONFIG_PHY_SUN4I_USB=y
+CONFIG_PHY_CADENCE_SIERRA=m
CONFIG_PHY_MIXEL_MIPI_DPHY=m
CONFIG_PHY_HI6220_USB=y
CONFIG_PHY_HISTB_COMBPHY=y
@@ -1147,6 +1156,8 @@ CONFIG_PHY_SAMSUNG_UFS=y
CONFIG_PHY_UNIPHIER_USB2=y
CONFIG_PHY_UNIPHIER_USB3=y
CONFIG_PHY_TEGRA_XUSB=y
+CONFIG_PHY_AM654_SERDES=m
+CONFIG_PHY_J721E_WIZ=m
CONFIG_ARM_SMMU_V3_PMU=m
CONFIG_FSL_IMX8_DDR_PMU=m
CONFIG_HISI_PMU=y
--
2.34.1
On Wed, Dec 08, 2021 at 11:38:56AM +0530, Vignesh Raghavendra wrote:
> Enable Cadence PCIe, Cadence USB, TI USB and PCIe wrappers and required
> SERDES drivers to support USB and PCIe on TI K3 SoCs.
>
> Signed-off-by: Vignesh Raghavendra <[email protected]>
Reported-by: Tom Rini <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
--
Tom
Hi Vignesh Raghavendra,
On Wed, 8 Dec 2021 11:38:56 +0530, Vignesh Raghavendra wrote:
> Enable Cadence PCIe, Cadence USB, TI USB and PCIe wrappers and required
> SERDES drivers to support USB and PCIe on TI K3 SoCs.
>
>
I have applied the following to branch ti-k3-config-next on [1].
Thank you!
[1/1] arm64: defconfig: Enable USB, PCIe and SERDES drivers for TI K3 SoC
commit: 8d73aedca28cbed8030067b0d9423a0694139b9c
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
Hi
On 15/12/21 12:37 pm, Vignesh Raghavendra wrote:
> Hi Vignesh Raghavendra,
>
> On Wed, 8 Dec 2021 11:38:56 +0530, Vignesh Raghavendra wrote:
>> Enable Cadence PCIe, Cadence USB, TI USB and PCIe wrappers and required
>> SERDES drivers to support USB and PCIe on TI K3 SoCs.
>>
>>
>
> I have applied the following to branch ti-k3-config-next on [1].
> Thank you!
>
> [1/1] arm64: defconfig: Enable USB, PCIe and SERDES drivers for TI K3 SoC
> commit: 8d73aedca28cbed8030067b0d9423a0694139b9c
>
Dropped this in favor or v2 [1] which only keeps USB driver configs.
PCIe will be added once its build-able as module based on comments at [2]
[1] https://lore.kernel.org/all/[email protected]/
[2] https://lore.kernel.org/linux-arm-kernel/CAK8P3a2VSBvOn1o+q1PYZaQ6LS9U4cz+DZGuDbisHkwNs2dAAw@mail.gmail.com/
Regards
Vignesh