The SDX55 SoC has IPA v4.5. It currently represents the path
between IPA and main memory using two consecutive interconnects.
This was an optimization--not required for correct operation--and
complicates things unnecessarily. It also does not conform to the
IPA binding (as pointed out by David Heidelberg).
This series fixes this by combining the two interconnects into one.
-Alex
Alex Elder (2):
ARM: dts: qcom: sdx55: fix IPA interconnect definitions
net: ipa: fix IPA v4.5 interconnect data
arch/arm/boot/dts/qcom-sdx55.dtsi | 6 ++----
drivers/net/ipa/ipa_data-v4.5.c | 7 +------
2 files changed, 3 insertions(+), 10 deletions(-)
--
2.32.0
Update the definition of the IPA interconnects for IPA v4.5 so
the path between IPA and system memory is represented by a single
"memory" interconnect.
Tested-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Alex Elder <[email protected]>
---
drivers/net/ipa/ipa_data-v4.5.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/net/ipa/ipa_data-v4.5.c b/drivers/net/ipa/ipa_data-v4.5.c
index e62ab9c3ac672..2da2c4194f2e6 100644
--- a/drivers/net/ipa/ipa_data-v4.5.c
+++ b/drivers/net/ipa/ipa_data-v4.5.c
@@ -420,15 +420,10 @@ static const struct ipa_mem_data ipa_mem_data = {
/* Interconnect rates are in 1000 byte/second units */
static const struct ipa_interconnect_data ipa_interconnect_data[] = {
{
- .name = "memory-a",
+ .name = "memory",
.peak_bandwidth = 600000, /* 600 MBps */
.average_bandwidth = 150000, /* 150 MBps */
},
- {
- .name = "memory-b",
- .peak_bandwidth = 1804000, /* 1.804 GBps */
- .average_bandwidth = 150000, /* 150 MBps */
- },
/* Average rate is unused for the next two interconnects */
{
.name = "imem",
--
2.32.0