2021-12-12 18:07:16

by Ajit Kumar Pandey

Subject: [PATCH v5 5/5] clk: x86: Fix clk_gate_flags for RV_CLK_GATE

In newer SoC we have to clear bit for disabling 48MHz oscillator
clock gate. Remove CLK_GATE_SET_TO_DISABLE flag for proper enable
and disable of 48MHz clock.

Signed-off-by: Ajit Kumar Pandey <[email protected]>
Reviewed-by: Mario Limonciello <[email protected]>
---
drivers/clk/x86/clk-fch.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/x86/clk-fch.c b/drivers/clk/x86/clk-fch.c
index d41d519b9c2b..fdc060e75839 100644
--- a/drivers/clk/x86/clk-fch.c
+++ b/drivers/clk/x86/clk-fch.c
@@ -82,7 +82,7 @@ static int fch_clk_probe(struct platform_device *pdev)

hws[CLK_GATE_FIXED] = clk_hw_register_gate(NULL, "oscout1",
"clk48MHz", 0, fch_data->base + MISCCLKCNTL1,
- OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL);
+ OSCCLKENB, 0, NULL);

devm_clk_hw_register_clkdev(&pdev->dev, hws[CLK_GATE_FIXED],
fch_data->name, NULL);
--
2.25.1

2022-01-07 01:59:28

by Stephen Boyd

Subject: Re: [PATCH v5 5/5] clk: x86: Fix clk_gate_flags for RV_CLK_GATE

Quoting Ajit Kumar Pandey (2021-12-12 10:05:27)
> In newer SoC we have to clear bit for disabling 48MHz oscillator
> clock gate. Remove CLK_GATE_SET_TO_DISABLE flag for proper enable
> and disable of 48MHz clock.
>
> Signed-off-by: Ajit Kumar Pandey <[email protected]>
> Reviewed-by: Mario Limonciello <[email protected]>
> ---

Applied to clk-next