2021-12-14 17:09:32

by Sam Protsenko

Subject: [PATCH] dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example

Now that HSI2C binding [1] is converted to dt-schema format, it reveals
incorrect HSI2C clocks order in USI binding example:

.../exynos-usi.example.dt.yaml:
i2c@13820000: clock-names:0: 'hsi2c' was expected
From schema: .../i2c-exynos5.yaml

.../exynos-usi.example.dt.yaml:
i2c@13820000: clock-names:1: 'hsi2c_pclk' was expected
From schema: .../i2c-exynos5.yaml

Change HSI2C clock order in USI binding example to satisfy HSI2C binding
requirements and fix above warnings.

[1] Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml

Signed-off-by: Sam Protsenko <[email protected]>
---
NOTE: If possible, it can be squashed into "dt-bindings: soc: samsung:
Add Exynos USI bindings" patch (already applied in Krzysztof tree)

Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
index 0af4821fae5e..273f2d95a043 100644
--- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
+++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
@@ -152,8 +152,8 @@ examples:
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
- clocks = <&cmu_peri 32>, <&cmu_peri 31>;
- clock-names = "hsi2c_pclk", "hsi2c";
+ clocks = <&cmu_peri 31>, <&cmu_peri 32>;
+ clock-names = "hsi2c", "hsi2c_pclk";
status = "disabled";
};
};
--
2.30.2

2021-12-15 07:36:21

by Krzysztof Kozlowski

Subject: Re: [PATCH] dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example

On Tue, 14 Dec 2021 19:09:24 +0200, Sam Protsenko wrote:
> Now that HSI2C binding [1] is converted to dt-schema format, it reveals
> incorrect HSI2C clocks order in USI binding example:
>
> .../exynos-usi.example.dt.yaml:
> i2c@13820000: clock-names:0: 'hsi2c' was expected
> From schema: .../i2c-exynos5.yaml
>
> [...]

Applied, thanks!

[1/1] dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
commit: d56a8e9c7af835a4f3f88b2ae34f4ba6f7085b7c

Best regards,
--
Krzysztof Kozlowski <[email protected]>

2021-12-15 07:36:48

by Krzysztof Kozlowski

Subject: Re: [PATCH] dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example

On 14/12/2021 18:09, Sam Protsenko wrote:
> Now that HSI2C binding [1] is converted to dt-schema format, it reveals
> incorrect HSI2C clocks order in USI binding example:
>
> .../exynos-usi.example.dt.yaml:
> i2c@13820000: clock-names:0: 'hsi2c' was expected
> From schema: .../i2c-exynos5.yaml
>
> .../exynos-usi.example.dt.yaml:
> i2c@13820000: clock-names:1: 'hsi2c_pclk' was expected
> From schema: .../i2c-exynos5.yaml
>
> Change HSI2C clock order in USI binding example to satisfy HSI2C binding
> requirements and fix above warnings.
>
> [1] Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
>
> Signed-off-by: Sam Protsenko <[email protected]>
> ---
> NOTE: If possible, it can be squashed into "dt-bindings: soc: samsung:
> Add Exynos USI bindings" patch (already applied in Krzysztof tree)
>

I already merged it between branches, so no squashing.

Best regards,
Krzysztof