The new STmicroelectronics STM32MP13 SoC embeds a new version
of the SDMMC peripheral (v2.2).
It supports SDR104 and HS200 modes.
Yann Gautier (4):
mmc: mmci: Add support for sdmmc variant revision v2.2
mmc: mmci: increase stm32 sdmmcv2 clock max freq
mmc: mmci: stm32: clear DLYB_CR after sending tuning command
mmc: mmci: add hs200 support for stm32 sdmmc
drivers/mmc/host/mmci.c | 7 ++++++-
drivers/mmc/host/mmci_stm32_sdmmc.c | 7 +++++--
2 files changed, 11 insertions(+), 3 deletions(-)
--
2.17.1
The variant->f_max is dependent on the IP, not on the SoC where it is
embedded. Set the max frequency of its source clock to 267MHz.
The frequency used will be limited by the IOs max frequency, set in the
SoC device tree.
Signed-off-by: Yann Gautier <[email protected]>
---
drivers/mmc/host/mmci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index c0478dfa61b9..45b8608c935c 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -280,7 +280,7 @@ static struct variant_data variant_stm32_sdmmc = {
static struct variant_data variant_stm32_sdmmcv2 = {
.fifosize = 16 * 4,
.fifohalfsize = 8 * 4,
- .f_max = 208000000,
+ .f_max = 267000000,
.stm32_clkdiv = true,
.cmdreg_cpsm_enable = MCI_CPSM_STM32_ENABLE,
.cmdreg_lrsp_crc = MCI_CPSM_STM32_LRSP_CRC,
--
2.17.1
The change is only hardware, and does not need driver change:
Added hardware flow control during transmit packet with variable delay.
The new id is then added to the ids list structure.
Signed-off-by: Yann Gautier <[email protected]>
---
drivers/mmc/host/mmci.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index c9cacd4d5b22..c0478dfa61b9 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -2435,6 +2435,11 @@ static const struct amba_id mmci_ids[] = {
.mask = 0xf0ffffff,
.data = &variant_stm32_sdmmcv2,
},
+ {
+ .id = 0x20253180,
+ .mask = 0xf0ffffff,
+ .data = &variant_stm32_sdmmcv2,
+ },
/* Qualcomm variants */
{
.id = 0x00051180,
--
2.17.1
On Wed, Dec 15, 2021 at 3:18 PM Yann Gautier <[email protected]> wrote:
> The new STmicroelectronics STM32MP13 SoC embeds a new version
> of the SDMMC peripheral (v2.2).
> It supports SDR104 and HS200 modes.
Patches look good to me!
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
On Wed, 15 Dec 2021 at 15:18, Yann Gautier <[email protected]> wrote:
>
> The new STmicroelectronics STM32MP13 SoC embeds a new version
> of the SDMMC peripheral (v2.2).
> It supports SDR104 and HS200 modes.
>
> Yann Gautier (4):
> mmc: mmci: Add support for sdmmc variant revision v2.2
> mmc: mmci: increase stm32 sdmmcv2 clock max freq
> mmc: mmci: stm32: clear DLYB_CR after sending tuning command
> mmc: mmci: add hs200 support for stm32 sdmmc
>
> drivers/mmc/host/mmci.c | 7 ++++++-
> drivers/mmc/host/mmci_stm32_sdmmc.c | 7 +++++--
> 2 files changed, 11 insertions(+), 3 deletions(-)
>
> --
> 2.17.1
>
Patch 1, 2 and 4, applied for next, thanks!
Kind regards
Uffe