Add support for sm8150 in the Qualcomm Limits Management Hardware(LMh)
driver. Also add required device tree entries and dt-binding.
Thara Gopinath (3):
thermal: qcom: lmh: Add support for sm8150
arm64: dts: qcom: sm8150: Add support for LMh node
dt-bindings: thermal: Add sm8150 compatible string for LMh
.../devicetree/bindings/thermal/qcom-lmh.yaml | 1 +
arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 +++++++
drivers/thermal/qcom/lmh.c | 62 +++++++++++--------
3 files changed, 60 insertions(+), 27 deletions(-)
--
2.25.1
Extend the LMh dt binding document to include compatible string
supporting sm8150 SoC.
Signed-off-by: Thara Gopinath <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/thermal/qcom-lmh.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
index 289e9a845600..a9b7388ca9ac 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
@@ -19,6 +19,7 @@ properties:
compatible:
enum:
- qcom,sdm845-lmh
+ - qcom,sm8150-lmh
reg:
items:
--
2.25.1
Add LMh nodes for cpu cluster0 and cpu cluster1 for sm8150 SoC.
Signed-off-by: Thara Gopinath <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 81b4ff2cc4cd..e755d7ab78dd 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3650,6 +3650,30 @@ cpufreq_hw: cpufreq@18323000 {
#freq-domain-cells = <1>;
};
+ lmh_cluster1: lmh@18350800 {
+ compatible = "qcom,sm8150-lmh";
+ reg = <0 0x18350800 0 0x400>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ cpus = <&CPU4>;
+ qcom,lmh-temp-arm-millicelsius = <60000>;
+ qcom,lmh-temp-low-millicelsius = <84500>;
+ qcom,lmh-temp-high-millicelsius = <85000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ lmh_cluster0: lmh@18358800 {
+ compatible = "qcom,sm8150-lmh";
+ reg = <0 0x18358800 0 0x400>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ cpus = <&CPU0>;
+ qcom,lmh-temp-arm-millicelsius = <60000>;
+ qcom,lmh-temp-low-millicelsius = <84500>;
+ qcom,lmh-temp-high-millicelsius = <85000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
wifi: wifi@18800000 {
compatible = "qcom,wcn3990-wifi";
reg = <0 0x18800000 0 0x800000>;
--
2.25.1