2021-12-24 23:46:37

by David Heidelberg

Subject: [PATCH] ARM: dts: qcom: fix timer node clock-frequency

Clock frequency is read by driver a single uint32,
so the second value was never processed.

Signed-off-by: David Heidelberg <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 3 +--
arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +--
arch/arm/boot/dts/qcom-mdm9615.dtsi | 3 +--
arch/arm/boot/dts/qcom-msm8660.dtsi | 3 +--
arch/arm/boot/dts/qcom-msm8960.dtsi | 3 +--
5 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 2d539d77bad4..3d5d9ffb66af 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -380,8 +380,7 @@ timer@200a000 {
<1 2 0x301>,
<1 3 0x301>;
reg = <0x0200a000 0x100>;
- clock-frequency = <27000000>,
- <32768>;
+ clock-frequency = <27000000>;
cpu-offset = <0x80000>;
};

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 996f4458d9fc..d663521bdd02 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -458,8 +458,7 @@ IRQ_TYPE_EDGE_RISING)>,
<GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_EDGE_RISING)>;
reg = <0x0200a000 0x100>;
- clock-frequency = <25000000>,
- <32768>;
+ clock-frequency = <25000000>;
clocks = <&sleep_clk>;
clock-names = "sleep";
cpu-offset = <0x80000>;
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi
index c32415f0e66d..8b58f80093e8 100644
--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
@@ -120,8 +120,7 @@ timer@200a000 {
<GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>,
<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
reg = <0x0200a000 0x100>;
- clock-frequency = <27000000>,
- <32768>;
+ clock-frequency = <27000000>;
cpu-offset = <0x80000>;
};

diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 1e8aab357f9c..b16060b65593 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -105,8 +105,7 @@ timer@2000000 {
<1 1 0x301>,
<1 2 0x301>;
reg = <0x02000000 0x100>;
- clock-frequency = <27000000>,
- <32768>;
+ clock-frequency = <27000000>;
cpu-offset = <0x40000>;
};

diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index 2a0ec97a264f..ca093b89c9ea 100644
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -99,8 +99,7 @@ timer@200a000 {
<1 2 0x301>,
<1 3 0x301>;
reg = <0x0200a000 0x100>;
- clock-frequency = <27000000>,
- <32768>;
+ clock-frequency = <27000000>;
cpu-offset = <0x80000>;
};

--
2.34.1

2022-02-01 20:51:12

by Bjorn Andersson

Subject: Re: [PATCH] ARM: dts: qcom: fix timer node clock-frequency

On Fri 24 Dec 17:46 CST 2021, David Heidelberg wrote:

> Clock frequency is read by driver a single uint32,
> so the second value was never processed.
>

I'm not familiar with the reasoning behind this, but the binding says
that we should have > 1 clock-frequency specified.

Regards,
Bjorn

> Signed-off-by: David Heidelberg <[email protected]>
> ---
> arch/arm/boot/dts/qcom-apq8064.dtsi | 3 +--
> arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +--
> arch/arm/boot/dts/qcom-mdm9615.dtsi | 3 +--
> arch/arm/boot/dts/qcom-msm8660.dtsi | 3 +--
> arch/arm/boot/dts/qcom-msm8960.dtsi | 3 +--
> 5 files changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index 2d539d77bad4..3d5d9ffb66af 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -380,8 +380,7 @@ timer@200a000 {
> <1 2 0x301>,
> <1 3 0x301>;
> reg = <0x0200a000 0x100>;
> - clock-frequency = <27000000>,
> - <32768>;
> + clock-frequency = <27000000>;
> cpu-offset = <0x80000>;
> };
>
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 996f4458d9fc..d663521bdd02 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -458,8 +458,7 @@ IRQ_TYPE_EDGE_RISING)>,
> <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) |
> IRQ_TYPE_EDGE_RISING)>;
> reg = <0x0200a000 0x100>;
> - clock-frequency = <25000000>,
> - <32768>;
> + clock-frequency = <25000000>;
> clocks = <&sleep_clk>;
> clock-names = "sleep";
> cpu-offset = <0x80000>;
> diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi
> index c32415f0e66d..8b58f80093e8 100644
> --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
> +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
> @@ -120,8 +120,7 @@ timer@200a000 {
> <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>,
> <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
> reg = <0x0200a000 0x100>;
> - clock-frequency = <27000000>,
> - <32768>;
> + clock-frequency = <27000000>;
> cpu-offset = <0x80000>;
> };
>
> diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
> index 1e8aab357f9c..b16060b65593 100644
> --- a/arch/arm/boot/dts/qcom-msm8660.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
> @@ -105,8 +105,7 @@ timer@2000000 {
> <1 1 0x301>,
> <1 2 0x301>;
> reg = <0x02000000 0x100>;
> - clock-frequency = <27000000>,
> - <32768>;
> + clock-frequency = <27000000>;
> cpu-offset = <0x40000>;
> };
>
> diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
> index 2a0ec97a264f..ca093b89c9ea 100644
> --- a/arch/arm/boot/dts/qcom-msm8960.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
> @@ -99,8 +99,7 @@ timer@200a000 {
> <1 2 0x301>,
> <1 3 0x301>;
> reg = <0x0200a000 0x100>;
> - clock-frequency = <27000000>,
> - <32768>;
> + clock-frequency = <27000000>;
> cpu-offset = <0x80000>;
> };
>
> --
> 2.34.1
>