This adds pins, groups, and functions for MediaLB devices on Renesas
R-Car E3 and D3 SoCs.
Signed-off-by: Nikita Yushchenko <[email protected]>
---
drivers/pinctrl/renesas/pfc-r8a77990.c | 22 ++++++++++++++++++++--
drivers/pinctrl/renesas/pfc-r8a77995.c | 14 ++++++++++++++
2 files changed, 34 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c
index f44c7da3ec16..b7ab4c520ae5 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -2339,6 +2339,16 @@ static const unsigned int intc_ex_irq5_mux[] = {
IRQ5_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_R8A77990
+/* - MLB+ ------------------------------------------------------------------- */
+static const unsigned int mlb_3pin_pins[] = {
+ RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19),
+};
+static const unsigned int mlb_3pin_mux[] = {
+ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
+};
+#endif /* CONFIG_PINCTRL_PFC_R8A77990 */
+
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
@@ -3842,7 +3852,7 @@ static const unsigned int vin5_clk_b_mux[] = {
static const struct {
struct sh_pfc_pin_group common[255];
#ifdef CONFIG_PINCTRL_PFC_R8A77990
- struct sh_pfc_pin_group automotive[21];
+ struct sh_pfc_pin_group automotive[22];
#endif
} pinmux_groups = {
.common = {
@@ -4125,6 +4135,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
+ SH_PFC_PIN_GROUP(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77990 */
};
@@ -4315,6 +4326,12 @@ static const char * const intc_ex_groups[] = {
"intc_ex_irq5",
};
+#ifdef CONFIG_PINCTRL_PFC_R8A77990
+static const char * const mlb_3pin_groups[] = {
+ "mlb_3pin",
+};
+#endif /* CONFIG_PINCTRL_PFC_R8A77990 */
+
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
@@ -4569,7 +4586,7 @@ static const char * const vin5_groups[] = {
static const struct {
struct sh_pfc_function common[49];
#ifdef CONFIG_PINCTRL_PFC_R8A77990
- struct sh_pfc_function automotive[4];
+ struct sh_pfc_function automotive[5];
#endif
} pinmux_functions = {
.common = {
@@ -4629,6 +4646,7 @@ static const struct {
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
+ SH_PFC_FUNCTION(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77990 */
};
diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c
index c56e1e4c13b3..d0f0d6b0f979 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77995.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77995.c
@@ -1295,6 +1295,14 @@ static const unsigned int mmc_ctrl_mux[] = {
MMC_CLK_MARK, MMC_CMD_MARK,
};
+/* - MLB+ ------------------------------------------------------------------- */
+static const unsigned int mlb_3pin_pins[] = {
+ RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 8),
+};
+static const unsigned int mlb_3pin_mux[] = {
+ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
+};
+
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
@@ -2049,6 +2057,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(i2c2_b),
SH_PFC_PIN_GROUP(i2c3_a),
SH_PFC_PIN_GROUP(i2c3_b),
+ SH_PFC_PIN_GROUP(mlb_3pin),
SH_PFC_PIN_GROUP(mmc_data1),
SH_PFC_PIN_GROUP(mmc_data4),
SH_PFC_PIN_GROUP(mmc_data8),
@@ -2314,6 +2323,10 @@ static const char * const vin4_groups[] = {
"vin4_clk",
};
+static const char * const mlb_3pin_groups[] = {
+ "mlb_3pin",
+};
+
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
@@ -2370,6 +2383,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(i2c1),
SH_PFC_FUNCTION(i2c2),
SH_PFC_FUNCTION(i2c3),
+ SH_PFC_FUNCTION(mlb_3pin),
SH_PFC_FUNCTION(mmc),
SH_PFC_FUNCTION(msiof0),
SH_PFC_FUNCTION(msiof1),
--
2.30.2
Hi Nikita,
On Sat, Dec 25, 2021 at 8:17 PM Nikita Yushchenko
<[email protected]> wrote:
> This adds pins, groups, and functions for MediaLB devices on Renesas
> R-Car E3 and D3 SoCs.
>
> Signed-off-by: Nikita Yushchenko <[email protected]>
Thanks for your patch!
> --- a/drivers/pinctrl/renesas/pfc-r8a77995.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a77995.c
> @@ -1295,6 +1295,14 @@ static const unsigned int mmc_ctrl_mux[] = {
> MMC_CLK_MARK, MMC_CMD_MARK,
> };
>
> +/* - MLB+ ------------------------------------------------------------------- */
> +static const unsigned int mlb_3pin_pins[] = {
Sort order.
> + RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 8),
According to Rev 0.7 of the R-Car D3 pin function sheet, you
mixed up MLB_SIG and MLB_DAT. Doesn't matter much, though.
> +};
> +static const unsigned int mlb_3pin_mux[] = {
> + MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
> +};
> +
> /* - MSIOF0 ----------------------------------------------------------------- */
> static const unsigned int msiof0_clk_pins[] = {
> /* SCK */
Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-pinctrl-for-v5.18 with the above fixed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds