For default mechanism, product would use default MRU 3500 if
they didn't define it. But for Foxconn SDX55, there is a known
issue which MRU 3500 would lead to data connection lost.
So we align it with Qualcomm default MRU settings.
Signed-off-by: Slark Xiao <[email protected]>
---
drivers/bus/mhi/pci_generic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
index 3a258a677df8..74e8fc342cfd 100644
--- a/drivers/bus/mhi/pci_generic.c
+++ b/drivers/bus/mhi/pci_generic.c
@@ -366,6 +366,7 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = {
.config = &modem_foxconn_sdx55_config,
.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
.dma_data_width = 32,
+ .mru_default = 32768,
.sideband_wake = false,
};
--
2.25.1
On Sat, Jan 15, 2022 at 06:39:12PM +0800, Slark Xiao wrote:
> For default mechanism, product would use default MRU 3500 if
> they didn't define it. But for Foxconn SDX55, there is a known
> issue which MRU 3500 would lead to data connection lost.
> So we align it with Qualcomm default MRU settings.
>
> Signed-off-by: Slark Xiao <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
You need to add Fixes tag so that I can queue this patch for v5.17 RCs.
Thanks,
Mani
> ---
> drivers/bus/mhi/pci_generic.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
> index 3a258a677df8..74e8fc342cfd 100644
> --- a/drivers/bus/mhi/pci_generic.c
> +++ b/drivers/bus/mhi/pci_generic.c
> @@ -366,6 +366,7 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = {
> .config = &modem_foxconn_sdx55_config,
> .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
> .dma_data_width = 32,
> + .mru_default = 32768,
> .sideband_wake = false,
> };
>
> --
> 2.25.1
>
At 2022-01-17 15:53:23, "Manivannan Sadhasivam" <[email protected]> wrote:
>On Sat, Jan 15, 2022 at 06:39:12PM +0800, Slark Xiao wrote:
>> For default mechanism, product would use default MRU 3500 if
>> they didn't define it. But for Foxconn SDX55, there is a known
>> issue which MRU 3500 would lead to data connection lost.
>> So we align it with Qualcomm default MRU settings.
>>
>> Signed-off-by: Slark Xiao <[email protected]>
>
>Reviewed-by: Manivannan Sadhasivam <[email protected]>
>
>You need to add Fixes tag so that I can queue this patch for v5.17 RCs.
>
>Thanks,
>Mani
>
Hi Mani,
New patch is committed. Please help do a check again.
Thanks!
>> ---
>> drivers/bus/mhi/pci_generic.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
>> index 3a258a677df8..74e8fc342cfd 100644
>> --- a/drivers/bus/mhi/pci_generic.c
>> +++ b/drivers/bus/mhi/pci_generic.c
>> @@ -366,6 +366,7 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = {
>> .config = &modem_foxconn_sdx55_config,
>> .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
>> .dma_data_width = 32,
>> + .mru_default = 32768,
>> .sideband_wake = false,
>> };
>>
>> --
>> 2.25.1
>>