This series fixes incorrect resolution detected.
We found this problem happened occasionally in the switch between bios
and bootloader.
Changes in v5:
- Rebase on top of 5.18f
Changes in v4:
- Correct the subject of patch
Changes in v3:
- In v2, we tried to increase the min-required-count of stable signal
to avoid incorrect transient state in timing detection. But it is
not working for all conditions.
Thus, we go another way in v3. Use regs, which can represent the
signal status, to decide if we needs to do detection again.
Changes in v2:
- Separate the patch into two patches
Jammy Huang (2):
media: aspeed: Add macro for the fields of the mode-detect registers
media: aspeed: Fix unstable timing detection
drivers/media/platform/aspeed-video.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
--
2.25.1
VE_MODE_DT_HOR_TOLER: the tolerance in detecting for stable horizontal
signal.
VE_MODE_DT_VER_TOLER: the tolerance in detecting for stable vertical
signal.
VE_MODE_DT_HOR_STABLE: the minimum required count in detecting stable
HSYNC signal to set mode detection horizontal signal stable.
VE_MODE_DT_VER_STABLE: the minimum required count in detecting stable
VSYNC signal to set mode detection vertical signal stable.
Signed-off-by: Jammy Huang <[email protected]>
---
drivers/media/platform/aspeed-video.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c
index 51fb18453b81..5d1ec3de50ad 100644
--- a/drivers/media/platform/aspeed-video.c
+++ b/drivers/media/platform/aspeed-video.c
@@ -178,6 +178,12 @@
#define VE_INTERRUPT_VSYNC_DESC BIT(11)
#define VE_MODE_DETECT 0x30c
+#define VE_MODE_DT_HOR_TOLER GENMASK(31, 28)
+#define VE_MODE_DT_VER_TOLER GENMASK(27, 24)
+#define VE_MODE_DT_HOR_STABLE GENMASK(23, 20)
+#define VE_MODE_DT_VER_STABLE GENMASK(19, 16)
+#define VE_MODE_DT_EDG_THROD GENMASK(15, 8)
+
#define VE_MEM_RESTRICT_START 0x310
#define VE_MEM_RESTRICT_END 0x314
@@ -1105,7 +1111,12 @@ static void aspeed_video_init_regs(struct aspeed_video *video)
aspeed_video_write(video, VE_SCALING_FILTER3, 0x00200000);
/* Set mode detection defaults */
- aspeed_video_write(video, VE_MODE_DETECT, 0x22666500);
+ aspeed_video_write(video, VE_MODE_DETECT,
+ FIELD_PREP(VE_MODE_DT_HOR_TOLER, 2) |
+ FIELD_PREP(VE_MODE_DT_VER_TOLER, 2) |
+ FIELD_PREP(VE_MODE_DT_HOR_STABLE, 6) |
+ FIELD_PREP(VE_MODE_DT_VER_STABLE, 6) |
+ FIELD_PREP(VE_MODE_DT_EDG_THROD, 0x65));
}
static void aspeed_video_start(struct aspeed_video *video)
--
2.25.1