2022-01-26 20:52:53

by Qu Huang

Subject: [PATCH] drm/amdgpu: Wrong order for config and counter_id parameters

From: huangqu <[email protected]>

Wrong order for config and counter_id parameters was passed, when calling df_v3_6_pmc_set_deferred and df_v3_6_pmc_is_deferred functions.

Signed-off-by: huangqu <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
index 43c5e3ec9..f4dfca013 100644
--- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
+++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
@@ -458,7 +458,7 @@ static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev,

#define DEFERRED_ARM_MASK (1 << 31)
static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
- int counter_idx, uint64_t config,
+ uint64_t config, int counter_idx,
bool is_deferred)
{

@@ -476,8 +476,8 @@ static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
}

static bool df_v3_6_pmc_is_deferred(struct amdgpu_device *adev,
- int counter_idx,
- uint64_t config)
+ uint64_t config,
+ int counter_idx)
{
return (df_v3_6_pmc_has_counter(adev, config, counter_idx) &&
(adev->df_perfmon_config_assign_mask[counter_idx]
--
2.31.1

2022-01-28 17:20:24

by Alex Deucher

Subject: Re: [PATCH] drm/amdgpu: Wrong order for config and counter_id parameters

Applied. Thanks!

Alex

On Wed, Jan 26, 2022 at 4:48 AM <[email protected]> wrote:
>
> From: huangqu <[email protected]>
>
> Wrong order for config and counter_id parameters was passed, when calling df_v3_6_pmc_set_deferred and df_v3_6_pmc_is_deferred functions.
>
> Signed-off-by: huangqu <[email protected]>
> ---
> drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
> index 43c5e3ec9..f4dfca013 100644
> --- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
> +++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
> @@ -458,7 +458,7 @@ static int df_v3_6_pmc_add_cntr(struct amdgpu_device *adev,
>
> #define DEFERRED_ARM_MASK (1 << 31)
> static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
> - int counter_idx, uint64_t config,
> + uint64_t config, int counter_idx,
> bool is_deferred)
> {
>
> @@ -476,8 +476,8 @@ static int df_v3_6_pmc_set_deferred(struct amdgpu_device *adev,
> }
>
> static bool df_v3_6_pmc_is_deferred(struct amdgpu_device *adev,
> - int counter_idx,
> - uint64_t config)
> + uint64_t config,
> + int counter_idx)
> {
> return (df_v3_6_pmc_has_counter(adev, config, counter_idx) &&
> (adev->df_perfmon_config_assign_mask[counter_idx]
> --
> 2.31.1
>