Hi all,
This series aims to bring the GPU support for the RK356x mainline. In
conjunction with the VOP2/HDMI TX patches v4 [0]) it has been tested
successfully on a RK3568 EVB1 with weston and glmark2-es2-wayland.
It should be noted that on the RK3568 EVB1 the supply of the GPU power
domain needs to be set to "always-on" in the device tree. There is an
ongoing discussion to provide a clean solution [1], in the meantime one
has to apply a hack.
Looking forward to your comments!
Best regards,
Michael
v6:
- use existing clock name "gpu" instead of "core"
- fix missing space in indentation
v5:
- address Rob's comments, describe clocks in SoC specific region
- move gpu_opp_table so that nodes without a reg are sorted alphabetically
- add GPU support to the RK3568 EVB1
v4: see https://lore.kernel.org/linux-rockchip/[email protected]/
v3: see https://lore.kernel.org/linux-rockchip/[email protected]/
v2: see https://lore.kernel.org/linux-rockchip/[email protected]/
[0] https://lore.kernel.org/linux-rockchip/[email protected]/
[1] https://lore.kernel.org/linux-rockchip/[email protected]/
Alex Bee (2):
dt-bindings: gpu: mali-bifrost: describe clocks for the rk356x gpu
arm64: dts: rockchip: add cooling map and trip points for gpu to
rk356x
Ezequiel Garcia (2):
arm64: dts: rockchip: add gpu node to rk356x
arm64: dts: rockchip: enable the gpu on quartz64-a
Michael Riesch (1):
arm64: dts: rockchip: enable the gpu on rk3568-evb1-v10
.../bindings/gpu/arm,mali-bifrost.yaml | 15 ++++
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 5 ++
.../boot/dts/rockchip/rk3568-evb1-v10.dts | 11 +++
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 76 +++++++++++++++++++
4 files changed, 107 insertions(+)
--
2.30.2
From: Ezequiel Garcia <[email protected]>
Enable the GPU core on the Pine64 Quartz64 Model A.
Signed-off-by: Ezequiel Garcia <[email protected]>
Signed-off-by: Alex Bee <[email protected]>
Signed-off-by: Michael Riesch <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index 3e65465ac7d5..b048db6cff3a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -221,6 +221,11 @@ &gmac1m0_clkinout
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
--
2.30.2
Enable the GPU core on the Rockchip RK3568 EVB1.
Signed-off-by: Michael Riesch <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
index d8a4f7a9f562..39c495ff0157 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
@@ -140,6 +140,11 @@ &gmac1m1_rgmii_clk
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
@@ -462,6 +467,12 @@ &sdmmc0 {
status = "okay";
};
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
&uart2 {
status = "okay";
};
--
2.30.2
From: Ezequiel Garcia <[email protected]>
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia <[email protected]>
Signed-off-by: Alex Bee <[email protected]>
Signed-off-by: Michael Riesch <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 49 ++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index ff1689283996..50bbea862a6a 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -144,6 +144,40 @@ scmi_clk: protocol@14 {
};
};
+ gpu_opp_table: opp-table-1 {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <900000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1000000>;
+ };
+ };
+
pmu {
compatible = "arm,cortex-a55-pmu";
interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
@@ -444,6 +478,21 @@ power-domain@RK3568_PD_RKVENC {
};
};
+ gpu: gpu@fde60000 {
+ compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+ reg = <0x0 0xfde60000 0x0 0x4000>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+ clock-names = "gpu", "bus";
+ #cooling-cells = <2>;
+ operating-points-v2 = <&gpu_opp_table>;
+ power-domains = <&power RK3568_PD_GPU>;
+ status = "disabled";
+ };
+
sdmmc2: mmc@fe000000 {
compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe000000 0x0 0x4000>;
--
2.30.2
From: Alex Bee <[email protected]>
The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock.
Reflect this in the SoC specific part of the binding.
Signed-off-by: Alex Bee <[email protected]>
[move the changes to the SoC section]
Signed-off-by: Michael Riesch <[email protected]>
---
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 63a08f3f321d..4d6bfae0653c 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -159,6 +159,21 @@ allOf:
power-domains:
maxItems: 1
sram-supply: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3568-mali
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ clock-names:
+ items:
+ - const: gpu
+ - const: bus
+ required:
+ - clock-names
examples:
- |
--
2.30.2
From: Alex Bee <[email protected]>
RK356x SoCs have a second thermal sensor for the GPU. This adds the
cooling map and trip points for it to make use of its contribution as
a cooling device.
Signed-off-by: Alex Bee <[email protected]>
Signed-off-by: Michael Riesch <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 27 ++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 50bbea862a6a..37194d735028 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1093,6 +1093,33 @@ gpu_thermal: gpu-thermal {
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&tsadc 1>;
+
+ trips {
+ gpu_threshold: gpu-threshold {
+ temperature = <70000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ gpu_target: gpu-target {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ gpu_crit: gpu-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&gpu_target>;
+ cooling-device =
+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+
};
};
--
2.30.2
On Wed, 9 Feb 2022 22:55:44 +0100, Michael Riesch wrote:
> This series aims to bring the GPU support for the RK356x mainline. In
> conjunction with the VOP2/HDMI TX patches v4 [0]) it has been tested
> successfully on a RK3568 EVB1 with weston and glmark2-es2-wayland.
>
> It should be noted that on the RK3568 EVB1 the supply of the GPU power
> domain needs to be set to "always-on" in the device tree. There is an
> ongoing discussion to provide a clean solution [1], in the meantime one
> has to apply a hack.
>
> [...]
Applied to drm-misc-next, thanks!
[1/5] dt-bindings: gpu: mali-bifrost: describe clocks for the rk356x gpu
commit: f1775c26e8b8809d922a29bb5e3df6ea503d2fa0
Best regards,
--
Heiko Stuebner <[email protected]>
On Wed, 09 Feb 2022 22:55:45 +0100, Michael Riesch wrote:
> From: Alex Bee <[email protected]>
>
> The Bifrost GPU in Rockchip RK356x SoCs has a core and a bus clock.
> Reflect this in the SoC specific part of the binding.
>
> Signed-off-by: Alex Bee <[email protected]>
> [move the changes to the SoC section]
> Signed-off-by: Michael Riesch <[email protected]>
> ---
> .../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
Reviewed-by: Rob Herring <[email protected]>
On Wed, 9 Feb 2022 22:55:44 +0100, Michael Riesch wrote:
> This series aims to bring the GPU support for the RK356x mainline. In
> conjunction with the VOP2/HDMI TX patches v4 [0]) it has been tested
> successfully on a RK3568 EVB1 with weston and glmark2-es2-wayland.
>
> It should be noted that on the RK3568 EVB1 the supply of the GPU power
> domain needs to be set to "always-on" in the device tree. There is an
> ongoing discussion to provide a clean solution [1], in the meantime one
> has to apply a hack.
>
> [...]
Applied, thanks!
[2/5] arm64: dts: rockchip: add gpu node to rk356x
commit: 810028668c6d9da25664195d6b906c98a8169f72
[3/5] arm64: dts: rockchip: add cooling map and trip points for gpu to rk356x
commit: c0a7259fad2df72469b602418083516c2cb3a7af
[4/5] arm64: dts: rockchip: enable the gpu on quartz64-a
commit: 6ac383456452378de07e55fc687069d1898a567d
[5/5] arm64: dts: rockchip: enable the gpu on rk3568-evb1-v10
commit: 679f048a10d8322d79010e0e52f18a6c17bdf306
[6] arm64: dts: rockchip: enable the tsadc on rk3568-evb1-v10
Best regards,
--
Heiko Stuebner <[email protected]>